Citation indices
 AllSince 2009
Citations20521263
h-index2017
i10-index2925
Citations to my articles
Citations to my articles
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Title / AuthorCited by Year
Low-latency virtual-channel routers for on-chip networks
R Mullins, A West, S Moore
ACM SIGARCH Computer Architecture News 32 (2), 188
3812004
Improving smart card security using self-timed circuits
G Taylor, S Moore, R Anderson, R Mullins, P Cunningham
2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems ...
2022002
Point to point GALS interconnect
S Moore, G Taylor, R Mullins, P Robinson
Asynchronous Circuits and Systems, 2002. Proceedings. Eighth International ...
1372002
Efficient physical embedding of topologically complex information processing networks in brains and computer circuits
DS Bassett, DL Greenfield, A Meyer-Lindenberg, DR Weinberger, ...
PLoS computational biology 6 (4), e1000748
1262010
The design and implementation of a low-latency on-chip network
R Mullins, A West, S Moore
Proceedings of the 2006 Asia and South Pacific Design Automation Conference ...
1132006
Balanced self-checking asynchronous logic for smart card applications
S Moore, R Anderson, R Mullins, G Taylor, JJA Fournier
Microprocessors and Microsystems 27 (9), 421-430
902003
A power and energy exploration of network-on-chip architectures
A Banerjee, R Mullins, S Moore
Proceedings of the First International Symposium on Networks-on-Chip, 163-172
892007
Security evaluation of asynchronous circuits
JJA Fournier, S Moore, H Li, R Mullins, G Taylor
Cryptographic Hardware and Embedded Systems-CHES 2003, 137-151
892003
Self calibrating clocks for globally asynchronous locally synchronous systems
SW Moore, GS Taylor, PA Cunningham, RD Mullins, P Robinson
Computer Design, 2000. Proceedings. 2000 International Conference on, 73-78
752000
A communication characterisation of Splash-2 and Parsec
N Barrow-Williams, C Fensch, S Moore
Workload Characterization, 2009. IISWC 2009. IEEE International Symposium on ...
622009
Multithreaded processor design
SW Moore
Kluwer Academic Publishers
621996
Demystifying data-driven and pausible clocking schemes
R Mullins, S Moore
Asynchronous Circuits and Systems, 2007. ASYNC 2007. 13th IEEE International ...
532007
Implications of Rent's rule for NoC design and its fault-tolerance
D Greenfield, A Banerjee, JG Lee, S Moore
Networks-on-Chip, 2007. NOCS 2007. First International Symposium on, 283-294
482007
An energy and performance exploration of network-on-chip architectures
A Banerjee, PT Wolkotte, RD Mullins, SW Moore, GJM Smit
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 17 (3 ...
432009
Security evaluation against electromagnetic analysis at design time
H Li, AT Markettos, S Moore
Cryptographic Hardware and Embedded Systems–CHES 2005, 280-292
432005
Analog micropipeline rings for high precision timing
S Fairbanks, S Moore
Asynchronous Circuits and Systems, 2004. Proceedings. 10th International ...
422004
The frequency injection attack on ring-oscillator-based true random number generators
AT Markettos, SW Moore
Cryptographic Hardware and Embedded Systems-CHES 2009, 317-331
412009
An on-chip dynamically recalibrated delay line for embedded self-timed systems
G Taylor, S Moore, S Wilcox, P Robinson
Advanced Research in Asynchronous Circuits and Systems, 2000.(ASYNC 2000 ...
312000
Flow-aware allocation for on-chip networks
A Banerjee, SW Moore
Networks-on-Chip, 2009. NoCS 2009. 3rd ACM/IEEE International Symposium on ...
232009
Self-timed circuitry for global clocking
S Fairbanks, S Moore
Asynchronous Circuits and Systems, 2005. ASYNC 2005. Proceedings. 11th IEEE ...
222005
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