| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 246 | 2020 |
| Nord: Node-router decoupling for effective power-gating of on-chip routers L Chen, TM Pinkston Microarchitecture (MICRO), 2012 45th Annual IEEE/ACM International Symposium …, 2012 | 195 | 2012 |
| Power punch: Towards non-blocking power-gating of noc routers L Chen, D Zhu, M Pedram, TM Pinkston 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 125 | 2015 |
| Futility scaling: High-associativity cache partitioning R Wang, L Chen 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 356-367, 2014 | 73 | 2014 |
| Mp3: Minimizing performance penalty for power-gating of clos network-on-chip L Chen, L Zhao, R Wang, TM Pinkston 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 67 | 2014 |
| Routerless Network-on-Chip F Alazemi, A AziziMazreah, B Bose, L Chen High Performance Computer Architecture (HPCA), 2018 IEEE International …, 2018 | 59 | 2018 |
| Worm-bubble flow control L Chen, TM Pinkston 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 56 | 2013 |
| TAPP: Temperature-aware application mapping for NoC-based many-core processors D Zhu, L Chen, TM Pinkston, M Pedram 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 55 | 2015 |
| Critical bubble scheme: An efficient implementation of globally aware network flow control L Chen, R Wang, TM Pinkston Parallel & Distributed Processing Symposium (IPDPS), 2011 IEEE International …, 2011 | 49 | 2011 |
| Tolerating Soft Errors in Deep Learning Accelerators with Reliable On-Chip Memory Designs A Azizimazreah, Y Gu, X Gu, L Chen 2018 IEEE International Conference on Networking, Architecture and Storage …, 2018 | 47 | 2018 |
| Shortcut Mining: Exploiting Cross-Layer Shortcut Reuse in DCNN Accelerators A Azizimazreah, L Chen 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 45 | 2019 |
| A Deep Reinforcement Learning Framework for Architectural Exploration: A Routerless NoC Case Study TR Lin, D Penney, M Pedram, L Chen 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 44 | 2020 |
| Predicting perceptions of the built environment using GIS, satellite and street view image approaches A Larkin, X Gu, L Chen, P Hystad Landscape and Urban Planning 216, 104257, 2021 | 42 | 2021 |
| A Survey of Machine Learning Applied to Computer Architecture Design DD Penney, L Chen arXiv preprint arXiv:1909.12373, 2019 | 33 | 2019 |
| Bubble coloring: avoiding routing-and protocol-induced deadlocks with minimal virtual channel requirement R Wang, L Chen, TM Pinkston Proceedings of the 27th international ACM conference on International …, 2013 | 30 | 2013 |
| XPro: A Cross-End Processing Architecture for Data Analytics in Wearables A Wang, L Chen, W Xu Proceedings of the 44th Annual International Symposium on Computer …, 2017 | 23 | 2017 |
| Application mapping for express channel-based networks-on-chip D Zhu, L Chen, S Yue, M Pedram 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 19 | 2014 |
| An analytical performance model for partitioning off-chip memory bandwidth R Wang, L Chen, TM Pinkston Parallel & Distributed Processing (IPDPS), 2013 IEEE 27th International …, 2013 | 19 | 2013 |
| Optimizing Routerless Network-on-Chip Designs: An Innovative Learning-Based Framework TR Lin, D Penney, M Pedram, L Chen arXiv preprint arXiv:1905.04423, 2019 | 15 | 2019 |
| UVMBench: A Comprehensive Benchmark Suite for Researching Unified Virtual Memory in GPUs Y Gu, W Wu, Y Li, L Chen arXiv preprint arXiv:2007.09822, 2020 | 14 | 2020 |
Timothy PinkstonProfessor of Electrical Engineering, University of Southern CaliforniaVerified email at usc.edu
