| SEAMERS: A semi-partitioned energy-aware scheduler for heterogeneous multicore real-time systems S Moulik, Z Das, R Devaraj, S Chakraborty Journal of Systems Architecture 114, 101953, 2021 | 21 | 2021 |
| Analysing the role of last level caches in controlling chip temperature S Chakraborty, HK Kapoor IEEE Transactions on Sustainable Computing 3 (4), 289-305, 2018 | 19 | 2018 |
| ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms Y Sharma, S Chakraborty, S Moulik The Journal of Supercomputing 78 (8), 1-25, 2022 | 13 | 2022 |
| Static energy reduction by performance linked cache capacity management in tiled cmps HK Kapoor, S Das, S Chakraborty Proceedings of the 30th Annual ACM Symposium on Applied Computing, 1913-1918, 2015 | 12 | 2015 |
| Exploring the role of large centralised caches in thermal efficient chip design S Chakraborty, HK Kapoor ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (5 …, 2019 | 11 | 2019 |
| A new recursive partitioning multicast routing algorithm for 3D network-on-chip NK Meena, HK Kapoor, S Chakraborty 18th International Symposium on VLSI Design and Test, 1-6, 2014 | 10 | 2014 |
| Static energy reduction by performance linked dynamic cache resizing S Chakraborty, HK Kapoor Very Large Scale Integration (VLSI-SoC), 2016 IFIP/IEEE International …, 2016 | 8 | 2016 |
| WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained DVFS for Reduced On-Chip Temperature and Leakage Consumption S Chakraborty, M Själander ACM Transactions on Architecture and Code Optimization (TACO) 18 (4), 1-25, 2021 | 6 | 2021 |
| Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs S Chakraborty, HK Kapoor Microprocessors and Microsystems 52, 221-235, 2017 | 6 | 2017 |
| Towards controlling chip temperature by dynamic cache reconfiguration in multiprocessors S Chakraborty, HK Kapoor 2017 30th International Conference on VLSI Design and 2017 16th …, 2017 | 6 | 2017 |
| Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization S Chakraborty, S Saha, M Själander, K Mcdonald-Maier ACM Transactions on Embedded Computing Systems (TECS) 20 (5s), 1-25, 2021 | 5 | 2021 |
| Performance constrained static energy reduction using way-sharing target-banks S Chakraborty, S Das, HK Kapoor 2015 IEEE International Parallel and Distributed Processing Symposium …, 2015 | 4 | 2015 |
| ACCURATE: Accuracy Maximization for Real-Time Multicore Systems With Energy-Efficient Way-Sharing Caches S Saha, S Chakraborty, X Zhai, S Ehsan, KD McDonald-Maier IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 3 | 2022 |
| Restore: real-time task scheduling on a temperature aware finfet based multicore Y Sharma, S Moulik, S Chakraborty 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 608-611, 2022 | 3 | 2022 |
| ABACa: access based allocation on set wise multi-retention in STT-RAM last level cache S Agarwal, S Chakraborty 2021 IEEE 32nd international conference on application-specific systems …, 2021 | 3 | 2021 |
| Static energy efficient cache reconfiguration for dynamic NUCA in tiled CMPs S Chakraborty, S Das, HK Kapoor Proceedings of the 31st Annual ACM Symposium on Applied Computing, 1739-1744, 2016 | 3 | 2016 |
| DELICIOUS: Deadline-aware approximate computing in cache-conscious multicore S Saha, S Chakraborty, S Agarwal, R Gangopadhyay, M Själander, ... IEEE Transactions on Parallel and Distributed Systems 34 (2), 718-733, 2022 | 2 | 2022 |
| STIFF: thermally safe temperature effect inversion aware FinFET based multi-core S Chakraborty, V Soteriou, M Själander Proceedings of the 19th ACM International Conference on Computing Frontiers …, 2022 | 2 | 2022 |
| RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress S Chakraborty, S Saha, M Sjalander, K McDonald-Maier 2020 International Conference on Hardware/Software Codesign and System …, 2020 | 1 | 2020 |
| Utility aware snoozy caches for energy efficient chip multi-processors AA Kulkarni, S Chakraborty, SP Mahajan, HK Kapoor Proceedings of the 2018 on Great Lakes Symposium on VLSI, 249-254, 2018 | 1 | 2018 |
Hemangee K KapoorIndian Institute of Technology GuwahatiVerified email at iitg.ernet.in
