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Tobias Alonso
Tobias Alonso
Member of Technical Staff at AMD Research and Advanced Development (RAD)
Email verificata su amd.com
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Citata da
Citata da
Anno
Memory-efficient dataflow inference for deep CNNs on FPGA
L Petrica, T Alonso, M Kroes, N Fraser, S Cotofana, M Blott
2020 International Conference on Field-Programmable Technology (ICFPT), 48-55, 2020
292020
Elastic-df: Scaling performance of dnn inference in fpga clouds through automatic partitioning
T Alonso, L Petrica, M Ruiz, J Petri-Koenig, Y Umuroglu, I Stamelos, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (2), 1-34, 2021
282021
LOCO-ANS: An optimization of JPEG-LS using an efficient and low-complexity coder based on ans
T Alonso, G Sutter, JEL De Vergara
IEEE Access 9, 106606-106626, 2021
52021
Submicrosecond latency video compression in a low-end FPGA-based system-on-chip
T Alonso, M Ruiz, ÁL García-Arias, G Sutter, JEL de Vergara
2018 28th International Conference on Field Programmable Logic and …, 2018
52018
An FPGA-based LOCO-ANS implementation for lossless and near-lossless image compression using high-level synthesis
T Alonso, G Sutter, JE López de Vergara
Electronics 10 (23), 2934, 2021
4*2021
Towards 100 GbE FPGA-Based Flow Monitoring
T Alonso, M Ruiz, G Sutter, S López-Buedo, JEL De Vergara
2019 X Southern Conference on Programmable Logic (SPL), 9-16, 2019
12019
Monitorización con FPGAs de flujos y sesiones TCP en enlaces de 40 Gbit/s
T Alonso, M Ruiz, G Sutter, C Sisterna, S López-Buedo, JEL de Vergara
Jornadas Sarteco, 2018
12018
Enhancing conditional stalling to boost performance of stream-processing logic with RAW dependencies
T Alonso, G Sutter, S López-Buedo, JEL de Vergara
IEEE Transactions on Circuits and Systems II: Express Briefs, 2023
2023
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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