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Caroline Trippel
Caroline Trippel
Assistant Professor, Stanford University
Verified email at stanford.edu - Homepage
Title
Cited by
Cited by
Year
RecSSD: near data processing for solid state drive based recommendation inference
M Wilkening, U Gupta, S Hsia, C Trippel, CJ Wu, D Brooks, GY Wei
Proceedings of the 26th ACM International Conference on Architectural …, 2021
802021
MeltdownPrime and SpectrePrime: Automatically-synthesized attacks exploiting invalidation-based coherence protocols
C Trippel, D Lustig, M Martonosi
arXiv preprint arXiv:1802.03802, 2018
782018
Checkmate: Automated synthesis of hardware exploits and security litmus tests
C Trippel, D Lustig, M Martonosi
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
732018
TriCheck: Memory model verification at the trisection of software, hardware, and ISA
C Trippel, YA Manerkar, D Lustig, M Pellauer, M Martonosi
ACM SIGPLAN Notices 52 (4), 119-133, 2017
652017
ArMOR: Defending against memory consistency model mismatches in heterogeneous architectures
D Lustig, C Trippel, M Pellauer, M Martonosi
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
492015
RecShard: statistical feature-based memory optimization for industry-scale neural recommendation
G Sethi, B Acun, N Agarwal, C Kozyrakis, C Trippel, CJ Wu
Proceedings of the 27th ACM International Conference on Architectural …, 2022
392022
Opening pandora’s box: A systematic study of new ways microarchitecture can leak private data
JRS Vicarte, P Shome, N Nayak, C Trippel, A Morrison, D Kohlbrenner, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
342021
Porcupine: A synthesizing compiler for vectorized homomorphic encryption
M Cowan, D Dangwal, A Alaghi, C Trippel, VT Lee, B Reagen
Proceedings of the 42nd ACM SIGPLAN International Conference on Programming …, 2021
322021
Security verification via automatic hardware-aware exploit synthesis: The CheckMate approach
C Trippel, D Lustig, M Martonosi
IEEE Micro 39 (3), 84-93, 2019
302019
Axiomatic hardware-software contracts for security
N Mosier, H Lachnitt, H Nemati, C Trippel
Proceedings of the 49th Annual International Symposium on Computer …, 2022
282022
Counterexamples and proof loophole for the C/C++ to POWER and ARMv7 trailing-sync compiler mappings
YA Manerkar, C Trippel, D Lustig, M Pellauer, M Martonosi
arXiv preprint arXiv:1611.01507, 2016
212016
Understanding and improving failure tolerant training for deep learning recommendation with partial recovery
K Maeng, S Bharuka, I Gao, M Jeffrey, V Saraph, BY Su, C Trippel, J Yang, ...
Proceedings of Machine Learning and Systems 3, 637-651, 2021
182021
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models
M Cosler, C Hahn, D Mendoza, F Schmitt, C Trippel
arXiv preprint arXiv:2303.04864, 2023
152023
Synthesizing formal models of hardware from RTL for efficient verification of memory model implementations
Y Hsiao, DP Mulligan, N Nikoleris, G Petri, C Trippel
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
142021
ILA-MCM: integrating memory consistency models with instruction-level abstractions for heterogeneous system-on-chip verification
H Zhang, C Trippel, YA Manerkar, A Gupta, M Martonosi, S Malik
2018 Formal Methods in Computer Aided Design (FMCAD), 1-10, 2018
142018
Counterexamples and proof loophole for the C/C++ to POWER and ARMv7 trailing-sync compiler mappings. CoRR abs/1611.01507 (2016)
YA Manerkar, C Trippel, D Lustig, M Pellauer, M Martonosi
arXiv preprint arxiv:1611.01507, 2016
102016
Analysis and mitigations of reverse engineering attacks on local feature descriptors
D Dangwal, VT Lee, HJ Kim, T Shen, M Cowan, R Shah, C Trippel, ...
arXiv preprint arXiv:2105.03812, 2021
82021
Opening pandora’s box: A systematic study of new ways microarchitecture can leak private data. In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)
JRS Vicarte, P Shome, N Nayak, C Trippel, A Morrison, D Kohlbrenner, ...
IEEE, 347ś360, 2021
62021
Full-stack memory model verification with tricheck
C Trippel, YA Manerkar, D Lustig, M Pellauer, M Martonosi
IEEE Micro 38 (3), 58-68, 2018
52018
CheckMate: Automated exploit program generation for hardware security verification
C Trippel, D Lustig, M Martonosi
Proc. 51st Int. Symp. Microarchit, 2018
52018
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