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Yiqi Wang
Yiqi Wang
Verified email at mails.tsinghua.edu.cn
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Year
A 28nm 29.2 TFLOPS/W BF16 and 36.5 TOPS/W INT8 reconfigurable digital CIM processor with unified FP/INT pipeline and bitwise in-memory booth multiplication for cloud deepá…
F Tu, Y Wang, Z Wu, L Liang, Y Ding, B Kim, L Liu, S Wei, Y Xie, S Yin
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022
732022
A 28nm 15.59 ÁJ/token full-digital bitline-transpose CIM-based sparse transformer accelerator with pipeline/parallel reconfigurable modes
F Tu, Z Wu, Y Wang, L Liang, L Liu, Y Ding, L Liu, S Wei, Y Xie, S Yin
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 466-468, 2022
392022
ReDCIM: Reconfigurable digital computing-in-memory processor with unified FP/INT pipeline for cloud AI acceleration
F Tu, Y Wang, Z Wu, L Liang, Y Ding, B Kim, L Liu, S Wei, Y Xie, S Yin
IEEE Journal of Solid-State Circuits 58 (1), 243-255, 2022
202022
TIMAQ: A time-domain computing-in-memory-based processor using predictable decomposed convolution for arbitrary quantized DNNs
J Yang, Y Kong, Z Zhang, Z Liu, J Zhou, Y Wang, Y Liu, C Guo, T Hu, C Li, ...
IEEE Journal of Solid-State Circuits 56 (10), 3021-3038, 2021
172021
16.1 MuITCIM: A 28nm /Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal Transformers
F Tu, Z Wu, Y Wang, W Wu, L Liu, Y Hu, S Wei, S Yin
2023 IEEE International Solid-State Circuits Conference (ISSCC), 248-250, 2023
152023
SDP: Co-designing algorithm, dataflow, and architecture for in-SRAM sparse NN acceleration
F Tu, Y Wang, L Liang, Y Ding, L Liu, S Wei, S Yin, Y Xie
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2022
122022
16.4 TensorCIM: A 28nm 3.7 nJ/gather and 8.3 TFLOPS/W FP32 digital-CIM tensor processor for MCM-CIM-based beyond-NN acceleration
F Tu, Y Wang, Z Wu, W Wu, L Liu, Y Hu, S Wei, S Yin
2023 IEEE International Solid-State Circuits Conference (ISSCC), 254-256, 2023
102023
TranCIM: Full-digital bitline-transpose CIM-based sparse transformer accelerator with pipeline/parallel reconfigurable modes
F Tu, Z Wu, Y Wang, L Liang, L Liu, Y Ding, L Liu, S Wei, Y Xie, S Yin
IEEE Journal of Solid-State Circuits 58 (6), 1798-1809, 2022
102022
GQNA: Generic quantized DNN accelerator with weight-repetition-aware activation aggregating
J Yang, F Tu, Y Li, Y Wang, L Liu, S Wei, S Yin
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (10), 4069-4082, 2022
72022
SPCIM: Sparsity-Balanced Practical CIM Accelerator With Optimized Spatial-Temporal Multi-Macro Utilization
Y Wang, F Tu, L Liu, S Wei, Y Xie, S Yin
IEEE Transactions on Circuits and Systems I: Regular Papers 70 (1), 214-227, 2022
62022
A time-domain computing-in-memory based processor using predictable decomposed convolution for arbitrary quantized DNNs
J Yang, Y Kong, Z Zhang, Z Liu, J Zhou, Y Wang, Y Liu, C Guo, T Hu, C Li, ...
2020 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2020
52020
Multcim: Digital computing-in-memory-based multimodal transformer accelerator with attention-token-bit hybrid sparsity
F Tu, Z Wu, Y Wang, W Wu, L Liu, Y Hu, S Wei, S Yin
IEEE Journal of Solid-State Circuits, 2023
42023
TensorCIM: Digital Computing-in-Memory Tensor Processor With Multichip-Module-Based Architecture for Beyond-NN Acceleration
Y Wang, Z Wu, W Wu, L Liu, Y Hu, S Wei, F Tu, S Yin
IEEE Journal of Solid-State Circuits, 2024
2024
OmniCIM: A Sparsity-Aware Computing-in-Memory based Processor for Accelerating Arbitrary Quantized Neural Networks
J Yang, Y Kong, Y Wang, Z Zhang, J Zhou, Z Liu, Y Liu, C Guo, T Hu, C Li, L ...
HotChips 2020, 2020
2020
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