Roberto Giorgi
Roberto Giorgi
Verified email at unisi.it - Homepage
Title
Cited by
Cited by
Year
Scheduled dataflow: Execution paradigm, architecture, and performance evaluation
KM Kavi, R Giorgi, J Arul
IEEE Transactions on Computers 50 (8), 834-846, 2001
1122001
TERAFLUX: Harnessing dataflow in next generation teradevices
R Giorgi, RM Badia, F Bodin, A Cohen, P Evripidou, P Faraboschi, ...
Microprocessors and Microsystems 38 (8), 976-990, 2014
722014
Guide to DataFlow Supercomputing: Basic Concepts, Case Studies, and a Detailed Example
V Milutinovic, J Salom, N Trifunovic, R Giorgi
Springer, 2015
70*2015
Dta-c: A decoupled multi-threaded architecture for cmp systems
R Giorgi, Z Popovic, N Puzovic
19th International Symposium on Computer Architecture and High Performance …, 2007
592007
WebMIPS: a new web-based MIPS simulation environment for computer architecture education
I Branovic, R Giorgi, E Martinelli
Proceedings of the 2004 workshop on Computer architecture education: held in …, 2004
562004
The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices
M Solinas, RM Badia, F Bodin, A Cohen, P Evripidou, P Faraboschi, ...
2013 Euromicro Conference on Digital System Design, 272-279, 2013
412013
TERAFLUX: exploiting dataflow parallelism in teradevices
R Giorgi
Proceedings of the 9th conference on Computing Frontiers, 303-304, 2012
412012
A scalable thread scheduling co-processor based on data-flow principles
R Giorgi, A Scionti
Future Generation Computer Systems, 2015
402015
An Introduction to DF-Threads and their Execution Model
R Giorgi, P Faraboschi
IEEE MPP 2014, 60-65, 2014
362014
Execution and cache performance of the scheduled dataflow architecture
KM Kavi, J Arul, R Giorgi
Journal of Universal Computer Science 6 (10), 948-967, 2000
352000
A workload characterization of elliptic curve cryptography methods in embedded environments
I Branovic, R Giorgi, E Martinelli
ACM SIGARCH Computer Architecture News 32 (3), 27-34, 2003
282003
Simulating the future kilo-x86-64 core processors and their infrastructure
A Portero, A Scionti, Z Yu, P Faraboschi, C Concatto, L Carro, A Garbade, ...
Proceedings of the 45th Annual Simulation Symposium, 1-7, 2012
272012
Trace factory: Generating workloads for trace-driven simulation of shared-bus multiprocessors
R Giorgi, CA Prete, G Prina, L Ricciardi
IEEE Concurrency 5 (4), 54-68, 1997
261997
A fault detection and recovery architecture for a teradevice dataflow system
S Weis, A Garbade, J Wolf, B Fechner, A Mendelson, R Giorgi, T Ungerer
2011 First Workshop on Data-Flow Execution Models for Extreme Scale …, 2011
252011
Teraflux: Exploiting tera-device computing challenges
A Portero, Z Yu, R Giorgi
Procedia Computer Science 7, 146-147, 2011
242011
Architectural Support for Fault Tolerance in a Teradevice Dataflow System
S Weis, A Garbade, B Fechner, A Mendelson, R Giorgi, T Ungerer
Int.l Journal of Parallel Programming, 1-25, 2014
232014
A performance evaluation of ARM ISA extension for elliptic curve cryptography over binary finite fields
S Bartolini, I Branovic, R Giorgi, E Martinelli
16th Symposium on Computer Architecture and High Performance Computing, 238-245, 2004
232004
PSCR: a coherence protocol for eliminating passive sharing in shared-bus shared-memory multiprocessors
R Giorgi, CA Prete
IEEE Transactions on Parallel and Distributed Systems 10 (7), 742-763, 1999
231999
Programming abstractions and toolchain for dataflow multithreading architectures
K Stavrou, D Pavlou, M Nikolaides, P Petrides, P Evripidou, P Trancoso, ...
2009 Eighth International Symposium on Parallel and Distributed Computing …, 2009
222009
Effects of instruction-set extensions on an embedded processor: a case study on elliptic curve cryptography over GF (2m)
S Bartolini, I Branovic, R Giorgi, E Martinelli
Computers, IEEE Transactions on 57 (5), 672-685, 2008
222008
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Articles 1–20