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Adnan Kabbani
Adnan Kabbani
A'Sharqiyah University
Verified email at asu.edu.om
Title
Cited by
Cited by
Year
Estimation of ground bounce effects on CMOS circuits
A Kabbani, AJ Al-Khalili
IEEE Transactions on components and Packaging Technologies 22 (2), 316-325, 1999
761999
Delay analysis of CMOS gates using modified logical effort model
A Kabbani, D Al-Khalili, AJ Al-Khalili
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
462005
Technology-portable analytical model for DSM CMOS inverter transition-time estimation
A Kabbani, D Al-Khalili, AJ Al-Khalili
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
272003
Logical effort based dynamic power estimation and optimization of static CMOS circuits
A Kabbani
Integration 43 (3), 279-288, 2010
182010
Case study of PV output power degradation rates in Oman
MS Honnurvali, N Gupta, K Goh, T Umar, A Kabbani, N Nazeema
IET Renewable Power Generation 13 (2), 352-360, 2019
152019
Modeling and optimization of switching power dissipation in static CMOS circuits
A Kabbani
2008 IEEE Computer Society Annual Symposium on VLSI, 281-285, 2008
142008
Complex CMOS gate collapsing technique and its application to transient time
A Kabbani
Journal of Circuits, Systems, and Computers 19 (05), 1025-1040, 2010
92010
A technique for dynamic CMOS noise immunity evaluation
A Kabbani, AJ Al-Khalili
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2003
92003
PV Cell Parameters Modeling and Temperature Effect Analysis.
A Kabbani, MS Honnurvali
International Journal of Renewable Energy Development 10 (3), 2021
82021
Can future smart cities powered by 100% renewables and made cyber secured-a analytical approach
MS Honnurvali, N Gupta, K Goh, T Umar, A Kabbani, N Nazecma
2019 IEEE 12th International Conference on Global Security, Safety and …, 2019
82019
Library-free synthesis for area-delay minimization
M Pullerits, A Kabbani
2008 International Conference on Microelectronics, 187-191, 2008
82008
Technology portable analytical model for DSM CMOS inverter delay estimation
A Kabbani, D AlKhalili, AJ Al-Khalili
IEE Proceedings-Circuits, Devices and Systems 152 (5), 433-440, 2005
82005
Delay macro modeling of CMOS gates using modified logical effort technique
A Kabbani, D Al-Khalili, AJ Al-Khalili
2004 IEEE International Conference on Semiconductor Electronics, 5 pp., 2004
72004
Area minimization for library-free synthesis
M Pullerits, A Kabbani
2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA …, 2009
62009
Dynamic CMOS noise immunity estimation in submicron regime
A Kabbani, AJ Al-Khalili
1999 IEEE International Symposium on Circuits and Systems (ISCAS) 1, 529-532, 1999
61999
FPGA implementation of adaptive segmentation for non-stationary biomedical signals
B Jiao, S Krishnan, A Kabbani
IET circuits, devices & systems 4 (3), 239-250, 2010
52010
Transistor sizing and VDD scaling for low power CMOS circuits
A Kabbani
2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA …, 2009
52009
Logical path delay distribution and transistor sizing
A Kabbani, D Al-Khalili, AJ Al-Khalili
The 3rd International IEEE-NEWCAS Conference, 2005., 391-394, 2005
52005
Dynamic CMOC noise immunity
A Kabbani, AJ Al-Khalili
Proceedings of the Tenth International Conference on Microelectronics (Cat …, 1998
41998
Optimum power supply for minimum energy in nano-CMOS circuits
A Kabbani
Electrical Engineering 100 (2), 741-747, 2018
12018
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