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Jorge Luiz e Silva
Jorge Luiz e Silva
Verified email at icmc.usp.br - Homepage
Title
Cited by
Cited by
Year
A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
JLE Silva, JJ Lopes
W. Trans. on Comp 9, 429-444, 2010
112010
Execution of algorithms using a dynamic dataflow model for reconfigurable hardware-commands in dataflow graph
VF Astolfi, JL e Silva
2007 3rd Southern Conference on Programmable Logic, 225-230, 2007
82007
Executing algorithms for dynamic dataflow reconfigurable hardware-the operators protocol
JLE Silva, E Marques
2006 IEEE International Conference on Reconfigurable Computing and FPGA's …, 2006
82006
Genetic algorithms and artificial neural networks to combinational circuit generation on reconfigurable hardware
BA Silva, MA Dias, JL Silva, FS Osorio
2010 International Conference on Reconfigurable Computing and FPGAs, 179-184, 2010
52010
Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing
MC Sacchetin, JJ Lopes, DF Wolf, JL Silva, E Marques
Latin American applied research 37 (1), 31-34, 2007
52007
Reconfigurable Computing–Experiences and Perspectives”
EDM Ordonez, JL Silva
Fundação de Ensino Eurípides Soares da Rocha (FEESR), Marília, 294pg, 2000
52000
A benchmark approach for compilers in reconfigurable hardware
JJ Lopes, JL e Silva, E Marques, JMP Cardoso
2006 6th International Workshop on System on Chip for Real Time Applications …, 2006
42006
Execution of algorithms using a dynamic dataflow model for reconfigurable hardware-a purpose for matching data
JL e Silva
2006 6th International Workshop on System on Chip for Real Time Applications …, 2006
42006
RtrASSoc: an adaptable superscalar reconfigurable system-on-chip. The simulator
JL Silva, RM Costa, GHR Jorge
The 3rd IEEE International Workshop on System-on-Chip for Real-Time …, 2003
42003
Research and Partial analysis of overhead of a partition model for a Partially Reconfigurable hardware in a data-driven machine-chicflow
F de Souza Junior, JL e Silva, L Sanches, V Astolfi
2010 VI Southern Programmable Logic Conference (SPL), 191-194, 2010
32010
The C Compiler generating a Source file in VHDL for a Dynamic Dataflow Machine being executed direct into a Hardware
JLE Silva, KAP Da Costa, VO Roda
WSEAS Transactions on Computers 8 (12), 1908-1916, 2009
32009
Using mobile robotics to teach reconfigurable computing
J Silva, MM Fernandes, V Bonato, R Menotti, JM Cardoso, E Marques
Proceedings of the IEEE Computer Society Workshop on Reconfigurable …, 2006
32006
Optimal inspection methodology for offshore structures based on an economic decision theory
S Florentino, D De Leon, J Silva
International Conference on Offshore Mechanics and Arctic Engineering 37440 …, 2004
32004
Processamento a fluxo de dados tolerante a falhas em um computador paralelo.
JL e Silva
University of Campinas, Brazil, 1992
31992
Gerenciamento de tags na arquitetura ChipCflow-uma máquina a fluxo de dados dinâmica
BA Silva
Universidade de São Paulo, 2011
22011
Chipcflow-A dynamic dataflowmachine using dynamic reconfigurable hardware
JL Silva, JJ Lopes, VO Roda, KP Costa
2009 5th Southern Conference on Programmable Logic (SPL), 213-216, 2009
22009
C commands Implemented direct into the hardware using the ChipCflow Machine
JL Silva, VM Correia
Proceedings, 2009
22009
RtrASSoc-adaptable superscalar reconfigurable programmable system on chip-the embedded operating system-EOS
JL Silva, KAP Costa
4th IEEE International Workshop on System-on-Chip for Real-Time Applications …, 2004
22004
The C Compiler generating a Source file in VHDL for a Dynamic Dataflow Machine
JLE Silva, KAP Da Costa, VO Roda
Proceedings of the 11th WSEAS international conference on Mathematical …, 2009
12009
The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine
JL Silva, KAP Costa, V Obac Roda, JJ Lopes
Proceedings, 2009
12009
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