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Elsayed A. Elsayed
Elsayed A. Elsayed
PhD Student at Computer Science Department, Tokyo Institute of Technology, Japan; Aswan University
Verified email at aswu.edu.eg - Homepage
Title
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Year
A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath
M Saitoh, EA Elsayed, T Van Chu, S Mashimo, K Kise
2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018
352018
Towards an Efficient Hardware Architecture for Odd-Even Based Merge Sorter
EA Elsayed, K Kise
2019 IEEE 13th International Symposium on Embedded Multicore/Many-core …, 2019
82019
Design and FPGA implementation of a simplified matrix processor
MI Soliman, EA Elsayed
2011 Seventh International Computer Engineering Conference (ICENCO'2011), 31-36, 2011
62011
High-performance and hardware-efficient odd-even based merge sorter
EA Elsayed, K Kise
IEICE Transactions on Information and Systems 103 (12), 2504-2517, 2020
32020
FPGA implementation and evaluation of a simple processor for multi-scalar/vector/matrix instructions
MI Soliman, EA Elsayed
2014 International Conference on Engineering and Technology (ICET), 1-7, 2014
32014
Performance evaluation of a simplified matrix processor
M Soliman, E Elsayed
Proc. 1st Taibah University International Conference on Computing and …, 2012
32012
Design and Evaluation of a Configurable Hardware Merge Sorter for Various Output Records
EA Elsayed, K Kise
2018 IEEE 12th International Symposium on Embedded Multicore/Many-core …, 2018
22018
Simple super-matrix processor: Implementation and performance evaluation
MI Soliman, EA Elsayed
Journal of Parallel and Distributed Computing 83, 96-118, 2015
12015
Simultaneous Multithreaded Matrix Processor
MI Soliman, EA Elsayed
Journal of Circuits, Systems and Computers 24 (08), 1550114, 2015
12015
FPGA implementation and performance evaluation of a simultaneous multithreaded matrix processor
MI Soliman, EA Elsayed
2014 9th International Conference on Computer Engineering & Systems (ICCES …, 2014
12014
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