| The superjunction insulated gate bipolar transistor optimization and modeling M Antoniou, F Udrea, F Bauer IEEE Transactions on Electron Devices 57 (3), 594-600, 2010 | 92 | 2010 |
| The Soft {Punchthrough}+ Superjunction Insulated Gate Bipolar Transistor: A High Speed Structure With Enhanced Electron Injection M Antoniou, F Udrea, F Bauer, I Nistor Electron Devices, IEEE Transactions on 58 (3), 769-775, 2011 | 60* | 2011 |
| A new way to alleviate the RC IGBT snapback phenomenon: The Super Junction solution M Antoniou, F Udrea, F Bauer, I Nistor 2010 22nd International Symposium on Power Semiconductor Devices & IC's …, 2010 | 53 | 2010 |
| Optimisation of superjunction bipolar transistor for ultra-fast switching applications M Antoniou, F Udrea, F Bauer Proceedings of the 19th International Symposium on Power Semiconductor …, 2007 | 53 | 2007 |
| Primary frequency regulation with load-side participation—Part II: Beyond passivity approaches E Devane, A Kasis, M Antoniou, I Lestas IEEE Transactions on Power Systems 32 (5), 3519-3528, 2016 | 44 | 2016 |
| TCAD device modelling and simulation of wide bandgap power semiconductors N Lophitis, A Arvanitopoulos, S Perkins, M Antoniou, YK Sharma Disruptive Wide Bandgap Semiconductors, Related Technologies, and Their …, 2018 | 39 | 2018 |
| Superjunction IGBT filling the gap between SJ MOSFET and ultrafast IGBT F Bauer, I Nistor, A Mihaila, M Antoniou, F Udrea IEEE electron device letters 33 (9), 1288-1290, 2012 | 38 | 2012 |
| The semi-superjunction IGBT M Antoniou, F Udrea, F Bauer, I Nistor IEEE Electron Device Letters 31 (6), 591-593, 2010 | 38 | 2010 |
| On the investigation of the “Anode Side” superJunction IGBT design concept M Antoniou, N Lophitis, F Udrea, F Bauer, UR Vemulapati, U Badstuebner IEEE Electron Device Letters 38 (8), 1063-1066, 2017 | 35 | 2017 |
| Novel approach towards plasma enhancement in Trench Insulated Gate Bipolar Transistors M Antoniou, N Lophitis, I Lestas, F Udrea, F Bauer, M Bellini, I Nistor, ... IEEE Electron Device Letters 36 (8), 823-825, 2015 | 30 | 2015 |
| The destruction mechanism in GCTs N Lophitis, M Antoniou, F Udrea, FD Bauer, I Nistor, M Arnold, T Wikstrom, ... IEEE transactions on electron devices 60 (2), 819-826, 2013 | 30 | 2013 |
| 200-V lateral superjunction LIGBT on partial SOI ECT Kho, AD Hoelke, SJ Pilkington, DK Pal, WAWZ Abidin, LY Ng, ... IEEE electron device letters 33 (9), 1291-1293, 2012 | 30 | 2012 |
| Validated physical models and parameters of bulk 3C–SiC aiming for credible technology computer aided design (TCAD) simulation A Arvanitopoulos, N Lophitis, KN Gyftakis, S Perkins, M Antoniou Semiconductor Science and Technology 32 (10), 104009, 2017 | 27 | 2017 |
| Retrograde p-well for 10-kV class SiC IGBTs AK Tiwari, M Antoniou, N Lophitis, S Perkin, T Trajkovic, F Udrea IEEE Transactions on Electron Devices 66 (7), 3066-3072, 2019 | 24 | 2019 |
| Physical parameterisation of 3C-Silicon Carbide (SiC) with scope to evaluate the suitability of the material for power diodes as an alternative to 4H-SiC A Arvanitopoulos, N Lophitis, S Perkins, KN Gyftakis, MB Guadas, ... 2017 IEEE 11th International Symposium on Diagnostics for Electrical …, 2017 | 23 | 2017 |
| 200 V superjunction N-type lateral insulated-gate bipolar transistor with improved latch-up characteristics EKC Tee, M Antoniou, F Udrea, A Holke, SJ Pilkington, DK Pal, NL Yew, ... IEEE transactions on electron devices 60 (4), 1412-1415, 2013 | 20 | 2013 |
| Point injection in trench insulated gate bipolar transistor for ultra low losses M Antoniou, F Udrea, F Bauer, A Mihaila, I Nistor 2012 24th International Symposium on Power Semiconductor Devices and ICs, 21-24, 2012 | 20 | 2012 |
| Experimental demonstration of the p-ring FS+ Trench IGBT concept: A new design for minimizing the conduction losses M Antoniou, N Lophitis, F Udrea, F Bauer, I Nistor, M Bellini, M Rahimo 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's …, 2015 | 18 | 2015 |
| The 3.3 kV Semi-SuperJunction IGBT for increased cosmic ray induced breakdown immunity M Antoniou, F Udrea, F Bauer 2009 21st International Symposium on Power Semiconductor Devices & IC's, 168-171, 2009 | 18 | 2009 |
| Experimentally validated three dimensional GCT wafer level simulations N Lophitis, M Antoniou, F Udrea, I Nistor, M Arnold, T Wikström, J Vobecky 2012 24th International Symposium on Power Semiconductor Devices and ICs …, 2012 | 17 | 2012 |
