VLSI architecture for a reconfigurable spectrally efficient FDM baseband transmitter PN Whatmough, MR Perrett, S Isam, I Darwazeh IEEE Transactions on Circuits and Systems I: Regular Papers 59 (5), 1107-1118, 2012 | 110 | 2012 |
Flexible hardware architecture of SEFDM transmitters with real-time non-orthogonal adjustment MR Perrett, I Darwazeh 2011 18th International Conference on Telecommunications, 369-374, 2011 | 37 | 2011 |
A verification methodology for the detection of spectrally efficient FDM signals generated using reconfigurable hardware MR Perrett, RC Grammenos, I Darwazeh 2012 IEEE International Conference on Communications (ICC), 3686-3691, 2012 | 15 | 2012 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent App. 15/222,726, 2017 | 12 | 2017 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent App. 15/183,499, 2016 | 10 | 2016 |
System and method for memory management of unique alpha-numeric order identifiers subjected to hashing and truncation for mapping to limited memory space H Hughes, P Ellis, A Moore, M Perrett US Patent 9,117,502, 2015 | 10 | 2015 |
A simple ethernet stack implementation in vhdl to enable fpga logic reconfigurability MR Perrett, I Darwazeh 2011 International Conference on Reconfigurable Computing and FPGAs, 286-290, 2011 | 6 | 2011 |
FPGA implementation of quad output generator for spectrally efficient wireless FDM evaluation M Perrett, I Darwazeh 7th International Symposium of Broadband Communications (ISBC), 2010 | 5 | 2010 |
Characterisation and verification of an FPGA signal generator for spectrally efficient wireless FDM MR Perrett, I Darwazeh 2012 19th International Conference on Telecommunications (ICT), 1-5, 2012 | 2 | 2012 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent 11,393,032, 2022 | 1 | 2022 |
Wireless multi-carrier communication system design and implementation using a custom hardware and software FPGA platform MR Perrett UCL (University College London), 2012 | 1 | 2012 |
Implementation of a M-sequence pseudo random binary sequence audio measurement system based on the Hadamard transform M Perrett University College London.-2010, 2010 | 1 | 2010 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent 11,599,944, 2023 | | 2023 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent 11,367,136, 2022 | | 2022 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent App. 16/588,669, 2020 | | 2020 |
Systems and methods for providing real-time pre-trade risk assessment M Perrett, P Ellis, H Hughes US Patent App. 16/248,472, 2019 | | 2019 |
Verification of FPGA Generated SEFDM Signals M Perrett, I Darwazeh | | |