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Krishna Rangan
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Thread motion: fine-grained power management for multi-core systems
KK Rangan, GY Wei, D Brooks
ACM SIGARCH Computer Architecture News 37 (3), 302-313, 2009
3552009
DeCoR: A delayed commit and rollback mechanism for handling inductive noise in processors
MS Gupta, KK Rangan, MD Smith, GY Wei, D Brooks
2008 IEEE 14th International Symposium on High Performance Computer …, 2008
1132008
Towards a software approach to mitigate voltage emergencies
MS Gupta, KK Rangan, MD Smith, GY Wei, D Brooks
Proceedings of the 2007 international symposium on Low power electronics and …, 2007
732007
Achieving uniform performance and maximizing throughput in the presence of heterogeneity
KK Rangan, MD Powell, GY Wei, D Brooks
2011 IEEE 17th International Symposium on High Performance Computer …, 2011
432011
Voltage noise: Why it’s bad, and what to do about it
VJ Reddi, MS Gupta, KK Rangan, S Campanoni, G Holloway, MD Smith, ...
5th IEEE Workshop on Silicon Errors in Logic-System Effects (SELSE), Palo …, 2009
202009
PPIM-SIM: an efficient simulator for a parallel processor in memory
KK Rangan, N Pisolkar, NB Abu-Ghazaleh, PA Wilsey
Proceedings. 34th Annual Simulation Symposium, 117-124, 2001
52001
Mechanism to provide workload and configuration-aware deterministic performance for microprocessors
A Varma, KV Sistla, MT Rowland, C Poirier, EJ DeHaemer, ...
US Patent 9,037,840, 2015
42015
Multithreaded Simulation to Increase Performance Modeling Throughput on Large Compute Grids
C Beckmann, O Khan, S Parthasarathy, A Klimkin, M Gambhir, B Slechta, ...
Proc. Workshop on Exascale Evaluation and Research Techniques (EXERT), 2010
32010
Mechanism to provide workload and configuration-aware deterministic performance for microprocessors
A Varma, KV Sistla, MT Rowland, C Poirier, EJ DeHaemer, ...
US Patent 9,417,681, 2016
22016
A distributed multiple-SIMD processor in memory
KK Rangan, NB Abu-Ghazaleh, PA Wilsey
International Conference on Parallel Processing, 2001., 507-514, 2001
12001
A Distributed Multiple-SIMD Intelligent Memory
KK Rangan, NB Abu-Ghazaleh, PA Wilsey
Proceedings of the 2001 International Conference on Parallel Processing, 507-516, 2001
12001
Mechanism to provide workload and configuration-aware deterministic performance for microprocessors
A Varma, KV Sistla, MT Rowland, C Poirier, EJ DeHaemer, ...
US Patent 10,345,884, 2019
2019
Calypso/Petra: Integrated Performance/Power/Power-Management Framework
K Rangan, M Powell, T Siddiqua, R Blumberg, E Wallace, A Biswas
Intel Design & Test Technology Conference, 2013
2013
Pre-Silicon New Architecture Power Management Exploration through Petra Integration with Simics
A Khan, K Han, M Mhameed, K Rangan, M Powell
Intel Design & Test Technology Conference, 2012
2012
Hardware-based thread scheduling for power-efficient and variation-resilient chip multiprocessors
KK Rangan
Harvard University, 2011
2011
Microcode Performance Simulation of on Intel 64 processor using MOOSE
K Subramaniam, A Chen, K Durand, K Rangan, C Weaver
Intel Design & Test Technology Conference, 2008
2008
Speeding Up Performance Simulation Models with Modular Design
S Mukherjee, C Beckmann, J Emer, K Rangan, M Adler, A Jaleel, S B, ...
Intel Design & Test Technology Conference, 2008
2008
Speeding Up Platform Performance Simulation by 10x: Myth or Reality?
S Mukherjee, C Beckmann, M Adler, J Emer, S Parthasarathy, K Rangan, ...
Intel Platform Arch Conference (IPAC), 2007
2007
Software Configuration Management for Modularity and Reuse
C Beckmann, P Hammarlund, K Rangan, O Maquelin, R Singhal, ...
Intel Simulation Summit, 2007
2007
Architectural support for data-intensive applications
KK Rangan, N Pisolkar, NB Abu-Ghazalch, PA Wilsey
Parallel and Distributed Processing Symposium, International 4, 30194b-30194b, 2001
2001
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