Mitigation of positive zero effect on nonminimum phase boost DC–DC converters in CCM VV Paduvalli, RJ Taylor, LR Hunt, PT Balsara IEEE Transactions on Industrial Electronics 65 (5), 4125-4134, 2017 | 45 | 2017 |
Analysis of zeros in a boost DC–DC converter: State diagram approach V Paduvalli, RJ Taylor, PT Balsara IEEE Transactions on Circuits and Systems II: Express Briefs 64 (5), 550-554, 2016 | 16 | 2016 |
Minimum phase wide output range digitally controlled SIDO boost converter SK Manohar, LR Hunt, PT Balsara, DK Bhatia, VV Paduvalli IEEE Transactions on Circuits and Systems I: Regular Papers 62 (9), 2351-2360, 2015 | 16 | 2015 |
Adaptive slope compensation for current mode switching power supply V Paduvalli US Patent 9,899,921, 2018 | 7 | 2018 |
NEM relay based memory architectures for low power design R Venkatasubramanian, SK Manohar, V Paduvalli, PT Balsara 2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO), 1-5, 2012 | 6 | 2012 |
System and method for controlling output ripple of dc-dc converters with leading edge modulation control using current injection RJ Taylor, LR Hunt, VV Paduvalli US Patent 9,690,308, 2017 | 5 | 2017 |
Detecting value of output capacitor in switching regulator VV Paduvalli US Patent 10,175,278, 2019 | 3 | 2019 |
Input output linearization with non-minimum phase boost DC-DC converters V Paduvalli, R Taylor, L Hunt, PT Balsara Nonlinear Theory and Its Applications, IEICE 7 (3), 419-429, 2016 | 1 | 2016 |
Analog input output linearization control RJ Taylor, PT Balsara, LR Hunt, VV Paduvalli United States Patent and Trademark Office, 2016 | | 2016 |
Analog Input Output Linearization Control V Paduvalli, RJ Taylor, LR Hunt, PT Balsara US Patent https://www.google.com/patents/US20,140,361,754, 2016 | | 2016 |
Techniques for efficient control of power converters VV Paduvalli The University of Texas at Dallas, 2016 | | 2016 |
State space control methods for power converters V Paduvalli, LR Hunt IEEE Power Electronics Society Newsletter, 7-10, 2013 | | 2013 |