Vijaykrishnan Narayanan

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	All	Since 2016
Citations	24365	6954
h-index	80	42
i10-index	364	176

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Mary Jane (Janie) IrwinEmerita Evan Pugh University Professor, CSE, Penn State UniversityVerified email at cse.psu.edu
Mahmut KandemirPennsylvania State UniversityVerified email at psu.edu
Yuan XieProfessor of University of California at Santa BarbaraVerified email at ece.ucsb.edu
Suman DattaStinson Chair ProfessorVerified email at nd.edu
Jack SampsonAssociate Professor, Pennsylvania State UniversityVerified email at psu.edu
Chita R. DasPenn State UniversityVerified email at cse.psu.edu
Xueqing LiAssociate Professor, Tsinghua UniversityVerified email at tsinghua.edu.cn
Anand SivasubramaniamDistinguished Professor of Computer Science & Engineering, Penn State UniversityVerified email at cse.psu.edu
Chrysostomos NicopoulosAssociate Professor, Department of ECE, University of CyprusVerified email at ucy.ac.cy
Huichu LiuIntel Labs, Intel CorporationVerified email at intel.com
Dongkook ParkIBM CorporationVerified email at us.ibm.com
Sumeet GuptaSchool of Electrical and Computer Engineering, Purdue UniversityVerified email at purdue.edu
vinay saripalliPhD in computer Science and Engineering, Penn State UniversityVerified email at psu.edu
Kaisheng MaInstitute for Interdisciplinary Information Sciences, Tsinghua UniversityVerified email at mail.tsinghua.edu.cn
Theocharis (Theo) TheocharidesAssociate Professor of Electrical and Computer Engineering, KIOS Research Center of ExcellenceVerified email at ucy.ac.cy
Soumya EachempatiPennsylvania State UniversityVerified email at intel.com
Asit MishraDeep Learning Computer Architect, NvidiaVerified email at nvidia.com
Richard BrooksProfessor, Computer Engineering, Clemson UniversityVerified email at acm.org
Marilyn WolfKoch Professor of Engineering and CSE ChairVerified email at unl.edu
Dheeraj MohataSenior Integration Engineer, GCS IncVerified email at gcsincorp.com

Vijaykrishnan Narayanan

Robert Noll Chair Professor at The Pennsylvania State University

Verified email at cse.psu.edu - Homepage

Computer Architecture Embedded Systems


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Leakage current: Moore's law meets static power NS Kim, T Austin, D Baauw, T Mudge, K Flautner, JS Hu, MJ Irwin, ... computer 36 (12), 68-75, 2003	1483	2003
The design and use of simplepower: a cycle-accurate energy estimation tool W Ye, N Vijaykrishnan, M Kandemir, MJ Irwin Proceedings of the 37th Annual Design Automation Conference, 340-345, 2000	640	2000
Design and management of 3D chip multiprocessors using network-in-memory F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir 33rd International Symposium on Computer Architecture (ISCA'06), 130-141, 2006	492	2006
Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005	390	2005
ViChaR: A dynamic virtual channel regulator for network-on-chip routers CA Nicopoulos, D Park, J Kim, N Vijaykrishnan, MS Yousif, CR Das 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006	367	2006
Dynamic management of scratch-pad memory space M Kandemir, J Ramanujam, MJ Irwin, N Vijaykrishnan, I Kadayif, A Parikh Proceedings of the 38th Design Automation Conference (IEEE Cat. No …, 2001	364	2001
Energy-driven integrated hardware-software optimizations using SimplePower N Vijaykrishnan, M Kandemir, MJ Irwin, HS Kim, W Ye ACM SIGARCH Computer Architecture News 28 (2), 95-106, 2000	354	2000
A novel dimensionally-decomposed router for on-chip communication in 3D architectures J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ... Proceedings of the 34th annual international symposium on Computer …, 2007	330	2007
A low latency router supporting adaptivity for on-chip interconnects J Kim, D Park, T Theocharides, N Vijaykrishnan, CR Das Proceedings. 42nd Design Automation Conference, 2005., 559-564, 2005	312	2005
Cache revive: Architecting volatile STT-RAM caches for enhanced performance in CMPs A Jog, AK Mishra, C Xu, Y Xie, V Narayanan, R Iyer, CR Das DAC Design Automation Conference 2012, 243-252, 2012	294	2012
Exploring fault-tolerant network-on-chip architectures D Park, C Nicopoulos, J Kim, N Vijaykrishnan, CR Das International Conference on Dependable Systems and Networks (DSN'06), 93-104, 2006	293	2006
Fault tolerant algorithms for network-on-chip interconnect M Pirretti, GM Link, RR Brooks, N Vijaykrishnan, M Kandemir, MJ Irwin IEEE computer society annual symposium on VLSI, 46-51, 2004	283	2004
A gracefully degrading and energy-efficient modular router architecture for on-chip networks J Kim, C Nicopoulos, D Park, V Narayanan, MS Yousif, CR Das ACM SIGARCH Computer Architecture News 34 (2), 4-15, 2006	281	2006
MIRA: A multi-layered on-chip interconnect router architecture D Park, S Eachempati, R Das, AK Mishra, Y Xie, N Vijaykrishnan, CR Das 2008 International Symposium on Computer Architecture, 251-261, 2008	280	2008
Using complete machine simulation for software power estimation: The softwatt approach S Gurumurthi, A Sivasubramaniam, MJ Irwin, N Vijaykrishnan, ... Proceedings Eighth International Symposium on High Performance Computer …, 2002	277	2002
Reducing leakage energy in FPGAs using region-constrained placement A Gayasen, Y Tsai, N Vijaykrishnan, M Kandemir, MJ Irwin, T Tuan Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004	275	2004
Interconnect and thermal-aware floorplanning for 3D microprocessors WL Hung, GM Link, Y Xie, N Vijaykrishnan, MJ Irwin 7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-104, 2006	238	2006
DRAM energy management using software and hardware directed power mode control V Delaluz, M Kandemir, N Vijaykrishnan, A Sivasubramaniam, MJ Irwin Proceedings HPCA Seventh International Symposium on High-Performance …, 2001	226	2001
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs R Das, S Eachempati, AK Mishra, V Narayanan, CR Das 2009 IEEE 15th International Symposium on High Performance Computer …, 2009	225	2009
Temperature-Dependent–Characteristics of a VerticalTunnel FET S Mookerjea, D Mohata, T Mayer, V Narayanan, S Datta IEEE Electron Device Letters 31 (6), 564-566, 2010	221	2010

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