| Composition operators on Hardy spaces of a half-plane S Elliott, MT Jury Bulletin of the London Mathematical Society 44 (3), 489-495, 2012 | 55 | 2012 |
| Composition operators on weighted Bergman spaces of a half-plane SJ Elliott, A Wynn Proceedings of the Edinburgh Mathematical Society 54 (2), 373-379, 2011 | 43 | 2011 |
| Verification of hardware designs to implement floating point power functions S Elliott GB Patent GB2,549,933 B, 2018 | 15 | 2018 |
| Adjoints of composition operators on Hardy spaces of the half-plane S Elliott Journal of Functional Analysis 256 (12), 4162-4186, 2009 | 14 | 2009 |
| A matrix-valued Aleksandrov disintegration theorem S Elliott Complex Analysis and Operator Theory 4, 145-157, 2010 | 8 | 2010 |
| Control path verification of hardware design for pipelined process A Darbari, S Elliott US Patent 10,325,044, 2019 | 7 | 2019 |
| Verification of hardware design for data transformation pipeline with equivalent data transformation element output constraint S Elliott US Patent 10,719,646, 2020 | 6 | 2020 |
| System and method for rounding reciprocal square root results of input floating point numbers C Van Benthem, S Elliott US Patent 11,294,625, 2022 | 4 | 2022 |
| Verification of hardware design for data transformation pipeline S Elliott US Patent 11,126,771, 2021 | 3* | 2021 |
| Similarity to an isometry of composition operators on the half-plane S Elliott Operators and Matrices 6 (3), 503-510, 2012 | 3 | 2012 |
| Float division by constant integer J Källén, S Elliott US Patent 11,294,634, 2022 | 2 | 2022 |
| Verification of hardware design for component that evaluates an algebraic expression using decomposition and recombination S Elliott, R Edmonds US Patent 11,531,800, 2022 | 1 | 2022 |
| Verifying a hardware design for a component that implements a permutation respecting function R McKemey, S Elliott, E Morini, M Freiburghaus US Patent 11,455,451, 2022 | 1* | 2022 |
| Formal verification of integrated circuit hardware designs to implement integer division E Morini, S Elliott US Patent 10,503,852, 2019 | 1 | 2019 |
| Method and System for Verifying a Sorter S Gaulter, T Ferrere, F Nazar, S Elliott US Patent App. 18/377,746, 2024 | | 2024 |
| Verification of hardware design for integrated circuit implementing polynomial input variable function S Elliott, R McKemey, M Freiburghaus US Patent App. 18/369,338, 2024 | | 2024 |
| Apparatus and method for processing floating-point numbers S Elliott, JOG Kallen, C Van Benthem US Patent 11,847,429, 2023 | | 2023 |
| Method and system for verifying a sorter S Gaulter, T Ferrere, F Nazar, S Elliott US Patent 11,783,105, 2023 | | 2023 |
| Hybrid fixed logic for performing multiplication T Rose, S Elliott US Patent App. 17/853,694, 2023 | | 2023 |
| Constant multiplication by division T Rose, S Elliott US Patent App. 17/854,927, 2023 | | 2023 |
Michael JuryProfessor of Mathematics, University of FloridaVerified email at ufl.edu
