Guy Lemieux
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System-on-chip: Reuse and integration
R Saleh, S Wilton, S Mirabbasi, A Hu, M Greenstreet, G Lemieux, ...
Proceedings of the IEEE 94 (6), 1050-1069, 2006
Directional and single-driver wires in FPGA interconnect
G Lemieux, E Lee, M Tom, A Yu
Proceedings. 2004 IEEE International Conference on Field-Programmable …, 2004
A survey and taxonomy of GALS design styles
P Teehan, M Greenstreet, G Lemieux
IEEE Design & Test of Computers 24 (5), 418-428, 2007
Using sparse crossbars within LUT
G Lemieux, D Lewis
Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field …, 2001
Design of interconnection networks for programmable logic
G Lemieux, D Lewis
Kluwer Academic Publishers, 2004
Generating highly-routable sparse crossbars for PLDs
G Lemieux, P Leventis, D Lewis
Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000
A detailed routing algorithm for allocating wire segments in field-programmable gate arrays
GG Lemieux, SD Brown
Proc. ACM/SIGDA Physical Design Workshop, Lake Arrowhead, CA, 215-226, 1993
ZUMA: An open FPGA overlay architecture
A Brant, GGF Lemieux
2012 IEEE 20th international symposium on field-programmable custom …, 2012
Logic block clustering of large designs for channel-width constrained FPGAs
M Tom, G Lemieux
Proceedings of the 42nd annual Design Automation Conference, 726-731, 2005
Circuit design of routing switches
G Lemieux, D Lewis
Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002
VEGAS: Soft vector processor with scratchpad memory
CH Chou, A Severance, AD Brant, Z Liu, S Sant, GGF Lemieux
Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011
VENICE: A compact vector processor for FPGA applications
A Severance, G Lemieux
2012 International Conference on Field-Programmable Technology, 261-268, 2012
Vector processing as a soft-core CPU accelerator
J Yu, G Lemieux, C Eagleston
Proceedings of the 16th international ACM/SIGDA symposium on Field …, 2008
On two-step routing for FPGAs
GGF Lemieux, SD Brown, D Vranesic
Proceedings of the 1997 international symposium on Physical design, 60-66, 1997
Embedded supercomputing in FPGAs with the VectorBlox MXP matrix processor
A Severance, GGF Lemieux
2013 International Conference on Hardware/Software Codesign and System …, 2013
The NUMAchine multiprocessor
ZG Vranesic, S Brown, M Stumm, S Caranci, A Grbic, R Grindley, M Gusat, ...
University of Toronto. Computer Systems Research Institute, 1995
Vector processing as a soft processor accelerator
J Yu, C Eagleston, CHY Chou, M Perreault, G Lemieux
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 2 (2), 1-34, 2009
An efficient FPGA overlay for portable custom instruction set extensions
D Koch, C Beckhoff, GGF Lemieux
2013 23rd international conference on field programmable logic and …, 2013
Procrustes: a dataflow and accelerator for sparse deep neural network training
D Yang, A Ghasemazar, X Ren, M Golub, G Lemieux, M Lis
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
A fully integrated 660 MHz low-swing energy-recycling DC–DC converter
M Alimadadi, S Sheikhaei, G Lemieux, S Mirabbasi, WG Dunford, ...
IEEE Transactions on Power Electronics 24 (6), 1475-1485, 2009
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