Daniel J. Sorin
Daniel J. Sorin
Professor of ECE and Computer Science, Duke University
Verified email at - Homepage
Cited by
Cited by
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
MMK Martin, DJ Sorin, BM Beckmann, MR Marty, M Xu, AR Alameldeen, ...
ACM SIGARCH Computer Architecture News 33 (4), 92-99, 2005
A primer on memory consistency and cache coherence
D Sorin, M Hill, D Wood
Springer Nature, 2022
SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery
DJ Sorin, MMK Martin, MD Hill, DA Wood
ACM SIGARCH Computer Architecture News 30 (2), 123-134, 2002
Argus: Low-cost, comprehensive error detection in simple cores
A Meixner, ME Bauer, D Sorin
40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007
Why on-chip cache coherence is here to stay
MMK Martin, MD Hill, DJ Sorin
Communications of the ACM 55 (7), 78-89, 2012
Fault tolerant computer architecture
D Sorin
Morgan & Claypool Publishers, 2009
Simulating a $2 M Commercial Server on a $2 K PC
AR Alameldeen, MMK Martin, CJ Mauer, KE Moore, M Xu, MD Hill, ...
Computer 36 (2), 50-57, 2003
Using destination-set prediction to improve the latency/bandwidth tradeoff in shared-memory multiprocessors
MMK Martin, PJ Harper, DJ Sorin, MD Hill, DA Wood
Proceedings of the 30th annual international symposium on Computer …, 2003
Architectures for online error detection and recovery in multicore processors
D Gizopoulos, M Psarakis, SV Adve, P Ramachandran, SKS Hari, D Sorin, ...
2011 Design, Automation & Test in Europe, 1-6, 2011
Robot motion planning on a chip.
S Murray, W Floyd-Jones, Y Qi, DJ Sorin, GD Konidaris
Robotics: Science and Systems 6, 2016
Analytic evaluation of shared-memory systems with ILP processors
DJ Sorin, VS Pai, SV Adve, MK Vernon, DA Wood
ACM SIGARCH Computer Architecture News 26 (3), 380-391, 1998
A mechanism for online diagnosis of hard faults in microprocessors
FA Bower, DJ Sorin, S Ozev
38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005
Multicast snooping: A new coherence method using a multicast address network
EE Bilir, RM Dickson, Y Hu, M Plakal, DJ Sorin, MD Hill, DA Wood
ACM SIGARCH Computer Architecture News 27 (2), 294-304, 1999
Tolerating hard faults in microprocessor array structures
FA Bower, PG Shealy, S Ozev, DJ Sorin
International Conference on Dependable Systems and Networks, 2004, 51-60, 2004
Dynamic power gating with quality guarantees
A Lungu, P Bose, A Buyuktosunoglu, DJ Sorin
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
Coset coding to extend the lifetime of memory
AN Jacobvitz, R Calderbank, DJ Sorin
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
Core cannibalization architecture: improving lifetime chip performance for multicore processors in the presence of hard faults
BF Romanescu, DJ Sorin
Proceedings of the 17th international conference on Parallel architectures …, 2008
Evaluating non-deterministic multi-threaded commercial workloads
AR Alameldeen, CJ Mauer, M Xu, PJ Harper, MMK Martin, DJ Sorin, ...
Proceedings of the Fifth Workshop on Computer Architecture Evaluation Using …, 2002
Dynamic verification of memory consistency in cache-coherent multithreaded computer architectures
A Meixner, DJ Sorin
IEEE Transactions on Dependable and Secure Computing 6 (1), 18-31, 2008
The impact of dynamically heterogeneous multicore processors on thread scheduling
FA Bower, DJ Sorin, LP Cox
IEEE micro 28 (3), 17-25, 2008
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