Alexander Marquardt
Alexander Marquardt
Elastic
Verified email at utoronto.ca - Homepage
Title
Cited by
Cited by
Year
Architecture and CAD for deep-submicron FPGAs
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 2012
16052012
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
A Marquardt, V Betz, J Rose
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999
3311999
Timing-driven placement for FPGAs
A Marquardt, V Betz, J Rose
Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000
3172000
The stratixπ routing and logic architecture
D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ...
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003
2942003
The Stratix II logic and routing architecture
D Lewis, E Ahmed, G Baeckler, V Betz, M Bourgeault, D Cashman, ...
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005
2252005
Speed and area tradeoffs in cluster-based FPGA architectures
A Marquardt, V Betz, J Rose
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 84-93, 2000
1112000
VPR and T-VPack user's manual
V Betz
http://www. eecg. utoronto. ca/vpr/VPR_5. pdf, 2009
532009
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 7,218,133, 2007
462007
Routing architecture for a programmable logic device
DM Lewis, P Leventis, AL Lee, BD Johnson, R Cliff, ST Reddy, CF Lane, ...
US Patent 6,630,842, 2003
262003
Architecture and CAD for deep-submicron FPGAs. Vol. 497
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 2012
222012
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 6,937,064, 2005
222005
Method and system for estimating the reliability of blacklists of botnet-infected computers
DO García, JL Garcia, AF Segador, A Marquardt, MV Vilasero
US Patent 8,516,595, 2013
212013
Cluster-based architecture, timing-driven packing and timing-driven placement for FPGAs.
AR Marquardt
University of Toronto, 2001
182001
Architecture and CAD for Deep-Submicron FPGAs. 1999
V Betz, J Rose, A Marquardt
Kluwer Academic Publishers, 0
11
Architecture and CAD for Deep-Submicron FPGAs, chapter Appendix B
V Betz, J Rose, A Marquardt
The Kluwer International Series in Engineering and Computer Science. Kluwer …, 1999
101999
Routing tools and routing architecture generation
V Betz, J Rose, A Marquardt
Architecture and CAD For Deep-Submicron FPGAS, 63-103, 1999
101999
Global Routing Architecture
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 105-126, 1999
91999
Background and Previous Work
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 11-35, 1999
91999
Detailed Routing Architecture
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 151-190, 1999
91999
Cluster-Based Logic Blocks
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 127-149, 1999
21999
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