Alexander Marquardt
Alexander Marquardt
Elastic
Verified email at utoronto.ca - Homepage
TitleCited byYear
Architecture and CAD for deep-submicron FPGAs
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 2012
14982012
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
A Marquardt, V Betz, J Rose
FPGA 99, 37-46, 1999
3091999
Timing-driven placement for FPGAs
A Marquardt, V Betz, J Rose
Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000
3032000
Speed and area tradeoffs in cluster-based FPGA architectures
A Marquardt, V Betz, J Rose
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 84-93, 2000
782000
VPR and T-VPack user's manual
V Betz
http://www. eecg. utoronto. ca/vpr/VPR_5. pdf, 2009
512009
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 7,218,133, 2007
462007
Routing architecture for a programmable logic device
DM Lewis, P Leventis, AL Lee, BD Johnson, R Cliff, ST Reddy, CF Lane, ...
US Patent 6,630,842, 2003
272003
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 6,937,064, 2005
222005
Cluster-based architecture, timing-driven packing and timing-driven placement for FPGAs.
AR Marquardt
University of Toronto, 2001
212001
Architecture and CAD for Deep-Submicron FPGAs. 1999
V Betz, J Rose, A Marquardt
Kluwer Academic Publishers, 0
11
Routing tools and routing architecture generation
V Betz, J Rose, A Marquardt
Architecture and CAD For Deep-Submicron FPGAS, 63-103, 1999
101999
Global Routing Architecture
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 105-126, 1999
91999
Background and Previous Work
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 11-35, 1999
91999
Detailed Routing Architecture
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 151-190, 1999
91999
Cluster-Based Logic Blocks
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 127-149, 1999
21999
CAD Tools: Packing and Placement
V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 37-61, 1999
11999
VPR User’s Manual
CAVPR Contributors, J Luu, L Tim, V Betz, J Anderson, J Rose
1
Course Notes available online Title: Application Notes
V Betz, J Rose, A Marquardt, G Lemieux, D Lewis, V George, J Rabaey
Instructor, 2013
2013
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 7,671,626, 2010
2010
Huelsbergen, L. 105 Katchan, I. 195 Kaviani, A. 60 Kim, HJ 41
HS Kim, JH Kim, S Kumar, V Lakamraju, A Leaver, M Leeser, ...
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