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Haris Suhail
Haris Suhail
Verified email at g.ucla.edu - Homepage
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Year
Designing a 2048-chiplet, 14336-core waferscale processor
S Pal, J Liu, I Alam, N Cebry, H Suhail, S Bu, SS Iyer, S Pamarti, R Kumar, ...
2021 58th ACM/IEEE Design Automation Conference (DAC), 1183-1188, 2021
192021
Performance analysis of decoupled cell association in multi-tier hybrid networks using real blockage environments
OW Bhatti, H Suhail, U Akbar, SA Hassan, H Pervaiz, L Musavian, Q Ni
2017 13th International wireless communications and mobile computing …, 2017
132017
I/o architecture, substrate design, and bonding process for a heterogeneous dielet-assembly based waferscale processor
S Pal, I Alam, K Sahoo, H Suhail, R Kumar, S Pamarti, P Gupta, SS Iyer
2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 298-303, 2021
42021
The First CMOS-Integrated Voltage-Controlled MRAM with 0.7 ns Switching Time
H Suhail, H He, J Yang, Q Shu, CY Wang, SY Yang, YC Hsin, CY Shih, ...
2023 International Electron Devices Meeting (IEDM), 1-4, 2023
2023
Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM
H Suhail, J Yang, H He, KL Wang, S Pamarti
2023 IEEE 66th International Midwest Symposium on Circuits and Systems …, 2023
2023
Fast startup of crystal and other high-Q oscillators
S Pamarti, H Suhail
US Patent 11,621,669, 2023
2023
Design of a Quick Startup Crystal Oscillator Circuit With Automatic Injection Frequency Calibration
H Suhail
University of California, Los Angeles, 2021
2021
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