Udit Gupta
TitleCited byYear
Ares: A framework for quantifying the resilience of deep neural networks
B Reagen, U Gupta, L Pentecost, P Whatmough, SK Lee, N Mulholland, ...
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
242018
Dynamic hazard resolution for pipelining irregular loops in high-level synthesis
S Dai, R Zhao, G Liu, S Srinath, U Gupta, C Batten, Z Zhang
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
162017
Rosetta: A realistic high-level synthesis benchmark suite for software programmable fpgas
Y Zhou, U Gupta, S Dai, R Zhao, N Srivastava, H Jin, J Featherston, ...
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
132018
Weightless: Lossy weight encoding for deep neural network compression
B Reagen, U Gupta, R Adolf, MM Mitzenmacher, AM Rush, GY Wei, ...
arXiv preprint arXiv:1711.04686, 2017
92017
Mapping-aware constrained scheduling for LUT-based FPGAs
M Tan, S Dai, U Gupta, Z Zhang
Proceedings of the 2015 ACM/SIGDA International Symposium on Field …, 2015
92015
On-chip deep neural network storage with multi-level eNVM
M Donato, B Reagen, L Pentecost, U Gupta, D Brooks, GY Wei
Proceedings of the 55th Annual Design Automation Conference, 169, 2018
72018
The Architectural Implications of Facebook's DNN-based Personalized Recommendation
U Gupta, X Wang, M Naumov, CJ Wu, B Reagen, D Brooks, B Cottel, ...
arXiv preprint arXiv:1906.03109, 2019
22019
Deep Learning Recommendation Model for Personalization and Recommendation Systems
M Naumov, D Mudigere, HJM Shi, J Huang, N Sundaraman, J Park, ...
arXiv preprint arXiv:1906.00091, 2019
22019
Rosetta: A Realistic Benchmark Suite for Software Programmable FPGAs
U Gupta, S Dai, Z Zhang
Suite of Embedded Applications and Kernels Workshop (SEAK), 2015
12015
MASR: A Modular Accelerator for Sparse RNNs
U Gupta, B Reagen, L Pentecost, M Donato, T Tambe, AM Rush, GY Wei, ...
arXiv preprint arXiv:1908.08976, 2019
2019
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators
PN Whatmough, SK Lee, M Donato, HC Hsueh, SL Xi, U Gupta, ...
2019 Symposium on VLSI Circuits, C34-C35, 2019
2019
Compressing Deep Neural Networks with Probabilistic Data Structures
B Reagen, U Gupta, R Adolf, MM Mitzenmacher, AM Rush, GY Wei, ...
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Articles 1–12