| Learning-Based Prediction of Embedded Memory Timing Failures During Initial Floorplan Design WTJ Chan, KY Chung, AB Kahng, ND MacDonald, S Nath Asia and South Pacific Design Automation Conference, 21st, pp. 178 - 185, 2016 | 37 | 2016 |
| Voltage-temperature sensor and system including the same KY Chung, D Jiao, M Zhang, Samsung Electronics Co., Ltd. US Patent 9,110,104, 2015 | 26 | 2015 |
| Structural delay testing of latch-based high-speed pipelines with time borrowing KY Chung, SK Gupta IEEE International Test Conference (ITC), 2003. Proceedings 1, 1089, 2003 | 22 | 2003 |
| Yield enhancement with DFM SW Paek, JH Kang, N Ha, BM Kim, DH Jang, J Jeon, DW Kim, KY Chung, ... Design for Manufacturability through Design-Process Integration VI 8327, 23-41, 2012 | 12 | 2012 |
| Test Compression Improvement with EDT Channel Sharing in SoC Designs Y Huang, M Kassab, J Jahangiri, J Rajski, WT Cheng, D Han, J Kim, ... Test Workshop (NATW), 2014 IEEE 23rd North Atlantic, 22-31, 2014 | 8 | 2014 |
| Low-cost scan-based delay testing of latch-based circuits with time borrowing KY Chung, SK Gupta VLSI Test Symposium, 2006. Proceedings. 24th IEEE, 8 pp.-15, 2006 | 8 | 2006 |
| Design and test of latch-based circuits to maximize performance, yield, and delay test quality KY Chung, SK Gupta Test Conference (ITC), 2010 IEEE International, 1-10, 2010 | 6 | 2010 |
| Comprehensive optimization of scan chain timing during late-stage IC implementation KY Chung, AB Kahng, J Li Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 1 | 2016 |
| Efficient scheduling of path delay tests for latch-based circuits KY Chung, SK Gupta VLSI Test Symposium, 2009. VTS'09. 27th IEEE, 103-110, 2009 | 1 | 2009 |
| Introduction to Design-For-Testability (DFT) - Fundamentals and Industry Practices KY Chung University of California, San Diego (UCSD); Guest Lecture for ECE 260B …, 2016 | | 2016 |
| Where is 3-D Test Going? Is it a new mainstream or a marginal trend (Panel) EJM Kun Young Chung, K. Chakrabarty, S. Goel, M. Koyanagi IEEE International Test Conference 2013 (http://itctestweek.org/files …, 2013 | | 2013 |
| Innovative practices session 6C: Latest practices in test compression J Colburn, KY Chung, H Konuk, Y Dong VLSI Test Symposium (VTS), 2013 IEEE 31st, 1-1, 2013 | | 2013 |
| Product How To: DFT strategy for ARM processor C Allsup, K Chung Test and Measurement World, EDN Network (http://www.edn.com/design/test-and …, 2013 | | 2013 |
| Test Cost Reduction using Shared IO KY Chung Synopsys Test Special Interest Group meeting at IEEE International Test …, 2012 | | 2012 |
| DFT Challenges in 3D ICs KY Chung Tutorial session of Test Technology Workshop 2012, The Institute of …, 2012 | | 2012 |
| Improving Test Yield using Power-Aware Test KY Chung Synopsys Test Special Interest Group meeting at IEEE International Test …, 2010 | | 2010 |
| Structural delay testing of latch-based high-speed circuits with time borrowing (PhD Dissertation) KY Chung University of Southern California, 2008 | | 2008 |
| A study on the development of a drying and fermentation process of domestic animal manure-(1)-Change in water content of pig manure under different drying conditions. SK Yoon, KY Chung, KD Woo, SH Yu Korean Journal of Environmental Agriculture 13, 1994 | | 1994 |
| Studies on the Fauna of the Soil Microarthropods in Forest Floor KS Woo, HY Choo, K Chung Korean journal of applied entomology 26 (3), 133-138, 1987 | | 1987 |
