| On the exploitation of a high-throughput SHA-256 FPGA design for HMAC HE Michail, GS Athanasiou, V Kelefouras, G Theodoridis, CE Goutis ACM Transactions on Reconfigurable Technology and Systems (TRETS) 5 (1), 1-28, 2012 | 53 | 2012 |
| Illegal logging detection based on acoustic surveillance of forest I Mporas, I Perikos, V Kelefouras, M Paraskevas Applied Sciences 10 (20), 7379, 2020 | 32 | 2020 |
| A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD V Kelefouras, A Kritikakou, C Goutis The Journal of Supercomputing 68, 1418-1440, 2014 | 26 | 2014 |
| A high-performance matrix–matrix multiplication methodology for CPU and GPU architectures V Kelefouras, A Kritikakou, I Mporas, V Kolonias The Journal of supercomputing 72, 804-844, 2016 | 25 | 2016 |
| Xandar: Exploiting the x-by-construction paradigm in model-based development of safety-critical systems L Masing, T Dörr, F Schade, J Becker, G Keramidas, CP Antonopoulos, ... 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-5, 2022 | 18 | 2022 |
| A methodology for speeding up fast fourier transform focusing on memory architecture utilization VI Kelefouras, GS Athanasiou, N Alachiotis, HE Michail, AS Kritikakou, ... IEEE Transactions on Signal Processing 59 (12), 6217-6226, 2011 | 18 | 2011 |
| Area-throughput trade-offs for SHA-1 and SHA-256 hash functions’ pipelined designs HE Michail, GS Athanasiou, VI Kelefouras, G Theodoridis, T Stouraitis, ... Journal of Circuits, Systems and Computers 25 (04), 1650032, 2016 | 17 | 2016 |
| A data locality methodology for matrix–matrix multiplication algorithm N Alachiotis, VI Kelefouras, GS Athanasiou, HE Michail, AS Kritikakou, ... The Journal of Supercomputing 59, 830-851, 2012 | 17 | 2012 |
| A methodology for speeding up matrix vector multiplication for single/multi-core architectures V Kelefouras, A Kritikakou, E Papadima, C Goutis The Journal of Supercomputing 71, 2644-2667, 2015 | 14 | 2015 |
| A systematic approach to classify design-time global scheduling techniques A Kritikakou, F Catthoor, V Kelefouras, C Goutis ACM Computing Surveys (CSUR) 45 (2), 1-30, 2013 | 14 | 2013 |
| Anatomy of deep learning image classification and object detection on commercial edge devices: A case study on face mask detection D Kolosov, V Kelefouras, P Kourtessis, I Mporas IEEE Access 10, 109167-109186, 2022 | 11 | 2022 |
| Design and implementation of 2D convolution on x86/x64 processors V Kelefouras, G Keramidas IEEE Transactions on Parallel and Distributed Systems 33 (12), 3800-3815, 2022 | 10 | 2022 |
| A methodology correlating code optimizations with data memory accesses, execution time and energy consumption V Kelefouras, K Djemame The Journal of Supercomputing 75 (10), 6710-6745, 2019 | 10 | 2019 |
| A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization V Kelefouras, A Kritikakou, C Goutis The Journal of Supercomputing 68, 459-487, 2014 | 10 | 2014 |
| A scalable and near-optimal representation of access schemes for memory management A Kritikakou, F Catthoor, V Kelefouras, C Goutis ACM Transactions on Architecture and Code Optimization (TACO) 11 (1), 1-25, 2014 | 10 | 2014 |
| SDN-based routing framework for elephant and mice flows using unsupervised machine learning M Al-Saadi, A Khan, V Kelefouras, DJ Walker, B Al-Saadi Network 3 (1), 218-238, 2023 | 8 | 2023 |
| Workflow simulation and multi-threading aware task scheduling for heterogeneous computing V Kelefouras, K Djemame Journal of Parallel and Distributed Computing 168, 17-32, 2022 | 8 | 2022 |
| Combining software cache partitioning and loop tiling for effective shared cache management V Kelefouras, G Keramidas, N Voros ACM Transactions on Embedded Computing Systems (TECS) 17 (3), 72, 2018 | 8* | 2018 |
| XANDAR: A holistic cybersecurity engineering process for safety-critical and cyber-physical systems F Siddiqui, R Khan, S Sezer, K McLaughlin, L Masing, T Dörr, F Schade, ... 2022 IEEE 95th Vehicular Technology Conference:(VTC2022-Spring), 1-5, 2022 | 7 | 2022 |
| A methodology for efficient tile size selection for affine loop kernels V Kelefouras, K Djemame, G Keramidas, N Voros International Journal of Parallel Programming 50 (3), 405-432, 2022 | 6 | 2022 |
Angeliki KritikakouUniverity of Rennes 1, IRISA/INRIAVerified email at irisa.fr
