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Since 2019
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1
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Puneet Panchal
PhD Candidate, UQIDAR
Verified email at uqidar.iitd.ac.in
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Reduced order modeling of electrical circuits: Simulation and hardware validation
P Panchal, YV Hote, S Saxena, C Krishnamurthi
2017 International Conference on Computing, Communication and Automation …
, 2017
1
2017
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