| Distributed run-time WCET controller for concurrent critical tasks in mixed-critical systems A Kritikakou, C Rochange, M Faugère, C Pagetti, M Roy, S Girbal, ... Proceedings of the 22nd International Conference on Real-Time Networks and …, 2014 | 83 | 2014 |
| Energy-aware multiple mobile chargers coordination for wireless rechargeable sensor networks L Mo, A Kritikakou, S He IEEE internet of things journal 6 (5), 8202-8214, 2019 | 73 | 2019 |
| Run-time control to increase task parallelism in mixed-critical systems A Kritikakou, C Pagetti, O Baldellon, M Roy, C Rochange 2014 26th Euromicro Conference on Real-Time Systems, 119-128, 2014 | 51 | 2014 |
| Ultra-low energy domain-specific instruction-set processors F Catthoor, P Raghavan, A Lambrechts, M Jayapala, A Kritikakou, J Absar Springer Science & Business Media, 2010 | 41 | 2010 |
| Energy-quality-time optimized task mapping on DVFS-enabled multicores L Mo, A Kritikakou, O Sentieys IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 37 | 2018 |
| Distributed node coordination for real-time energy-constrained control in wireless sensor and actuator networks L Mo, X Cao, Y Song, A Kritikakou IEEE internet of things journal 5 (5), 4151-4163, 2018 | 28 | 2018 |
| Dynascore: Dynamic software controller to increase resource utilization in mixed-critical systems A Kritikakou, T Marty, M Roy ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (2 …, 2017 | 26 | 2017 |
| A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD V Kelefouras, A Kritikakou, C Goutis The Journal of Supercomputing 68, 1418-1440, 2014 | 26 | 2014 |
| A high-performance matrix–matrix multiplication methodology for CPU and GPU architectures V Kelefouras, A Kritikakou, I Mporas, V Kolonias The Journal of supercomputing 72, 804-844, 2016 | 25 | 2016 |
| Controllable QoS for imprecise computation tasks on DVFS multicores with time and energy constraints L Mo, A Kritikakou, O Sentieys IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018 | 24 | 2018 |
| Event-driven joint mobile actuators scheduling and control in cyber-physical systems L Mo, P You, X Cao, Y Song, A Kritikakou IEEE Transactions on Industrial Informatics 15 (11), 5877-5891, 2019 | 21 | 2019 |
| Data merge: A data aggregation technique for wireless sensor networks D Tsitsipis, SM Dima, A Kritikakou, C Panagiotou, S Koubias ETFA2011, 1-4, 2011 | 21 | 2011 |
| Approximation-aware task deployment on asymmetric multicore processors L Mo, A Kritikakou, O Sentieys 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 18 | 2019 |
| A methodology for speeding up fast fourier transform focusing on memory architecture utilization VI Kelefouras, GS Athanasiou, N Alachiotis, HE Michail, AS Kritikakou, ... IEEE Transactions on Signal Processing 59 (12), 6217-6226, 2011 | 18 | 2011 |
| Fault-tolerant mapping of real-time parallel applications under multiple DVFS schemes M Cui, A Kritikakou, L Mo, E Casseau 2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium …, 2021 | 17 | 2021 |
| A data locality methodology for matrix–matrix multiplication algorithm N Alachiotis, VI Kelefouras, GS Athanasiou, HE Michail, AS Kritikakou, ... The Journal of Supercomputing 59, 830-851, 2012 | 17 | 2012 |
| Monitoring on-line timing information to support mixed-critical workloads A Kritikakou, O Baldellon, C Pagetti, C Rochange, M Roy, F Vargas IEEE Real-Time Systems Symposium 2013, 9-10, 2013 | 16 | 2013 |
| Wcet-aware parallelization of model-based applications for multi-cores: The argo approach S Derrien, I Puaut, P Alefragis, M Bednara, H Bucher, C David, Y Debray, ... Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 15 | 2017 |
| Ultra high speed SHA-256 hashing cryptographic module for ipsec hardware/software codesign H Michail, G Athanasiou, A Kritikakou, C Goutis, A Gregoriades, ... 2010 International Conference on Security and Cryptography (SECRYPT), 1-5, 2010 | 15 | 2010 |
| A methodology for speeding up matrix vector multiplication for single/multi-core architectures V Kelefouras, A Kritikakou, E Papadima, C Goutis The Journal of Supercomputing 71, 2644-2667, 2015 | 14 | 2015 |
Olivier SentieysProfessor, University of Rennes, IRISA, INRIA, FranceVerified email at irisa.fr
