| First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices R Delhougne, A Arreghini, E Rosseel, A Hikavyy, E Vecchio, L Zhang, ... 2018 IEEE Symposium on VLSI Technology, 203-204, 2018 | 141 | 2018 |
| Vertical Ferroelectric HfO2 FET based on 3-D NAND Architecture: Towards Dense Low-Power Memory K Florent, M Pesic, A Subirats, K Banerjee, S Lavizzari, A Arreghini, ... 2018 IEEE International Electron Devices Meeting (IEDM), 2.5. 1-2.5. 4, 2018 | 128 | 2018 |
| Long term charge retention dynamics of SONOS cells A Arreghini, N Akil, F Driussi, D Esseni, L Selmi, MJ Van Duuren Solid-State Electronics 52 (9), 1460-1466, 2008 | 70 | 2008 |
| Experimental and simulation analysis of program/retention transients in silicon nitride-based NVM cells E Vianello, F Driussi, A Arreghini, P Palestri, D Esseni, L Selmi, N Akil, ... IEEE transactions on electron devices 56 (9), 1980-1990, 2009 | 59 | 2009 |
| Experimental characterization of the vertical position of the trapped charge in Si nitride-based nonvolatile memory cells A Arreghini, F Driussi, E Vianello, D Esseni, MJ van Duuren, ... IEEE Transactions on Electron Devices 55 (5), 1211-1219, 2008 | 58 | 2008 |
| Comprehensive investigation of the impact of lateral charge migration on retention performance of planar and 3D SONOS devices A Maconi, A Arreghini, CM Compagnoni, AS Spinelli, J Van Houdt, ... Solid-State Electronics 74, 64-70, 2012 | 53 | 2012 |
| Validation of retention modeling as a trap-profiling technique for SiN-based charge-trapping memories A Suhane, A Arreghini, R Degraeve, L Breuil, MB Zahid, M Jurczak, ... IEEE electron device letters 31 (1), 77-79, 2009 | 44 | 2009 |
| A comprehensive understanding of the erase of TANOS memories through charge separation experiments and simulations A Padovani, A Arreghini, L Vandelli, L Larcher, P Pavan, J Van Houdt IEEE transactions on electron devices 58 (9), 3147-3155, 2011 | 38 | 2011 |
| Quantitative and predictive model of reading current variability in deeply scaled vertical poly-Si channel for 3D memories M Toledano-Luque, R Degraeve, B Kaczer, B Tang, PJ Roussel, P Weckx, ... 2012 International Electron Devices Meeting, 9.2. 1-9.2. 4, 2012 | 36 | 2012 |
| Highly scaled vertical cylindrical SONOS cell with bilayer polysilicon channel for 3-D NAND flash memory GS Kar, P Blomme, A Arreghini, A Cacciato, L Breuil, A De Keersgieter, ... IEEE electron device letters 32 (11), 1501-1503, 2011 | 32 | 2011 |
| Statistical poly-Si grain boundary model with discrete charging defects and its 2D and 3D implementation for vertical 3D NAND channels R Degraeve, S Clima, V Putcha, B Kaczer, P Roussel, D Linten, ... 2015 IEEE International Electron Devices Meeting (IEDM), 5.6. 1-5.6. 4, 2015 | 30 | 2015 |
| Statistical characterization of current paths in narrow poly-Si channels R Degraeve, M Toledano-Luque, A Suhane, A Arreghini, B Tang, ... 2011 International Electron Devices Meeting, 12.4. 1-12.4. 4, 2011 | 30 | 2011 |
| New charge pumping model for the analysis of the spatial trap distribution in the nitride layer of SONOS devices A Arreghini, F Driussi, D Esseni, L Selmi, MJ Van Duuren, R Van Schaijk Microelectronic Engineering 80, 333-336, 2005 | 30 | 2005 |
| Statistical spectroscopy of switching traps in deeply scaled vertical poly-Si channel for 3D memories M Toledano-Luque, R Degraeve, PJ Roussel, V Luong, B Tang, JG Lisoni, ... 2013 IEEE International Electron Devices Meeting, 21.3. 1-21.3. 4, 2013 | 28 | 2013 |
| Impact of the charge transport in the conduction band on the retention of Si-nitride based memories E Vianello, F Driussi, P Palestri, A Arreghini, D Esseni, L Selmi, N Akil, ... ESSDERC 2008-38th European Solid-State Device Research Conference, 107-110, 2008 | 27 | 2008 |
| Vertical ferroelectric HfO K Florent, M Pesic, A Subirats, K Banerjee, S Lavizzari, A Arreghini IEDM Tech. Dig 2, 1-2.5, 2017 | 25 | 2017 |
| Laser Thermal Anneal of polysilicon channel to boost 3D memory performance JG Lisoni, A Arreghini, G Congedo, M Toledano-Luque, I Toqué-Tresonne, ... 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 25 | 2014 |
| A consistent model for oxide trap profiling with the trap spectroscopy by charge injection and sensing (TSCIS) technique M Cho, R Degraeve, P Roussel, B Govoreanu, B Kaczer, MB Zahid, ... Solid-state electronics 54 (11), 1384-1391, 2010 | 25 | 2010 |
| Impact of lateral charge migration on the retention performance of planar and 3D SONOS devices A Maconi, A Arreghini, CM Compagnoni, AS Spinelli, J Van Houdt, ... 2011 Proceedings of the European Solid-State Device Research Conference …, 2011 | 24 | 2011 |
| Analysis of performance/variability trade-off in Macaroni-type 3-D NAND memory G Congedo, A Arreghini, L Liu, E Capogreco, JG Lisoni, K Huet, ... 2014 IEEE 6th International Memory Workshop (IMW), 1-4, 2014 | 21 | 2014 |
