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Cited by
Cited by
Year
Automatic FSM synthesis for low-power mixed synchronous/asynchronous implementation
B Oelmann, K Tammemäe, M Kruus, M O'Nils
VLSI Design 12 (2), 167-186, 2001
202001
The Rational Unified Process with the" 4+ 1" View Model of Software Architecture-a Way for Modeling Web Applications.
T Robal, V Viies, M Kruus
BalticDB&IS, 119-132, 2002
112002
FPGA platform based digital design education
D Mihhailov, M Kruus, A Sudnitson
Proceedings of the 9th International Conference on Computer Systems and …, 2008
92008
Hierarchical identification of untestable faults in sequential circuits
J Raik, R Ubar, A Krivenko, M Kruus
10th Euromicro Conference on Digital System Design Architectures, Methods …, 2007
92007
Applets for learning digital design and test
R Ubar, A Jutman, M Kruus, HD Wuttke
IMCL Conf, 19-21, 2006
72006
Web-based system for sequential machines decomposition
S Devadze, E Fomina, M Kruus, A Sudnitson
The IEEE Region 8 EUROCON 2003. Computer as a Tool. 1, 57-61, 2003
72003
FPGA-based time and cost effective Hamming weight comparators for binary vectors
V Sklyarov, I Skliarova, A Sudnitson, M Kruus
IEEE EUROCON 2015-International Conference on Computer as a Tool (EUROCON), 1-6, 2015
62015
Innovation and entrepreneurship in the computer systems curricula and Nordic Master School in Innovative ICT
G Jervan, P Ellervee, M Kruus
2011 Proceedings of the 22nd EAEEIE Annual Conference (EAEEIE), 1-4, 2011
62011
Teaching FPGA-based systems
I Skliarova, V Sklyarov, A Sudnitson, M Kruus
2014 IEEE Global Engineering Education Conference (EDUCON), 460-469, 2014
52014
Project-oriented approach to low-power topics in advanced digital design course
D Mihhailov, A Sudnitson, M Kruus
Elektronika ir Elektrotechnika 102 (6), 151-154, 2010
52010
Reconfigurable systems in engineering education: Best practices and future trends
I Skliarova, V Sklyarov, A Sudnitson, M Kruus
2017 IEEE Global Engineering Education Conference (EDUCON), 1084-1088, 2017
42017
Involving students in teaching process—encouraging student-generated content in ict studies
H Kruus, P Ellervee, T Robal, P Ruberg, M Kruus
2013 24th EAEEIE Annual Conference (EAEEIE 2013), 76-81, 2013
42013
Improved VHDL Input for High-Level Synthesis Tool xTractor
P Ellervee, E Ivask, M Kruus
2006 International Biennial Baltic Electronics Conference, 1-4, 2006
42006
Learning Digital Test and Diagnostics via Internet
R Ubar, A Jutman, M Kruus, E Orasson, S Devadze, HD Wuttke
International Journal of Computing & Information Sciences 4 (2), 86-96, 2006
42006
Environment for innovative university research training in the field of digital test
AS Oyeniran, T Ademilua, M Kruus, R Ubar
2021 30th Annual Conference of the European Association for Education in …, 2021
32021
Integration of high-level synthesis to the courses on reconfigurable digital systems
I Skliarova, V Sklyarov, A Sudnitson, M Kruus
2015 38th International Convention on Information and Communication …, 2015
32015
A benchmark suite for evaluating the efficiency of test tools
H Kruus, R Ubar, P Ellervee, M Gorev, V Pesonen, S Devadze, E Orasson, ...
2012 13th Biennial Baltic Electronics Conference, 85-88, 2012
32012
Advanced topics of FSM design using FPGA educational boards and web-based tools
A Sudnitson, D Mihhailov, M Kruus
2010 East-West Design & Test Symposium (EWDTS), 514-517, 2010
32010
Synthesis of Sequential Circuits with Dynamic Power management
H Lensen, M Kruus, A Sudnitson
RTUCET 1, 81-86, 2001
32001
Hardware close programming for freshmen
H Kruus, M Brik, M Kruus, P Ruberg, V Viies, P Ellervee
10th European Workshop on Microelectronics Education (EWME), 93-96, 2014
22014
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