Evangelia Kasapaki
Evangelia Kasapaki
Department of Applied Mathematics and Computer Science, Technical University of Denmark
Verified email at dtu.dk
TitleCited byYear
T-CREST: Time-predictable multi-core architecture for embedded systems
M Schoeberl, S Abbaspour, B Akesson, N Audsley, R Capasso, J Garside, ...
Journal of Systems Architecture 61 (9), 449-471, 2015
A statically scheduled time-division-multiplexed network-on-chip for real-time systems
M Schoeberl, F Brandner, J Sparsø, E Kasapaki
2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 152-160, 2012
Argo: A real-time network-on-chip architecture with an efficient GALS implementation
E Kasapaki, M Schoeberl, RB Sørensen, C Müller, K Goossens, J Sparsø
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 479-492, 2015
An area-efficient network interface for a TDM-based network-on-chip
J Sparsø, E Kasapaki, M Schoeberl
Proceedings of the Conference on Design, Automation and Test in Europe, 1044 …, 2013
Argo: A time-elastic time-division-multiplexed noc using asynchronous routers
E Kasapaki, J Sparsø
2014 20th IEEE International Symposium on Asynchronous Circuits and Systems …, 2014
Router designs for an asynchronous time-division-multiplexed network-on-chip
E Kasapaki, J Sparsø, RB Sørensen, K Goossens
2013 Euromicro Conference on Digital System Design, 319-326, 2013
The Argo NoC: combining TDM and GALS
E Kasapaki, J Sparsø
2015 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015
Synthesis and layout of an asynchronous network-on-chip using standard EDA tools
CT Müller, E Kasapaki, RB Sørensen, J Sparsø
2014 NORCHIP, 1-6, 2014
An Asynchronous Time-Division-Multiplexed Network-on-Chip for Real-Time Systems
E Kasapaki, J Sparsø, M Schoeberl
Technical University of Denmark (DTU), 2015
A loosely synchronizing asynchronous router for TDM-scheduled NoCS
I Kotleas, D Humphreys, RB Sørensen, E Kasapaki, F Brandner, J Sparsø
2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 151-158, 2014
Actual-delay circuits on FPGA: Trading-off luts for speed
E Kassapaki, PM Mattheakis, CP Sotiriou
2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006
A reconfigurable mixed-time-criticality SDRAM controller
SLM Goossens, S Goossens, K Chandrasekar, B Akesson, K Goossens, ...
PhD thesis, Technische Universiteit Eindhoven, 2015
Argo Programming Guide
E Kasapaki, RB Sørensen
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Articles 1–13