| 18-GHz, 4.0-aJ/bit operation of ultra-low-energy rapid single-flux-quantum shift registers M Tanaka, M Ito, A Kitayama, T Kouketsu, A Fujimaki Japanese Journal of Applied Physics 51 (5R), 053102, 2012 | 175 | 2012 |
| Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, Y Yamanashi, M Tanaka, A Akimoto, H Park, Y Kamiya, N Irie, ... IEEE transactions on applied superconductivity 17 (2), 474-477, 2007 | 129 | 2007 |
| Bit-serial single flux quantum microprocessor CORE A Fujimaki, M Tanaka, T Yamada, Y Yamanashi, H Park, N Yoshikawa IEICE transactions on electronics 91 (3), 342-349, 2008 | 122 | 2008 |
| Design and demonstration of an 8-bit bit-serial RSFQ microprocessor: CORE e4 Y Ando, R Sato, M Tanaka, K Takagi, N Takagi, A Fujimaki IEEE Transactions on Applied Superconductivity 26 (5), 1-5, 2016 | 106 | 2016 |
| 100 GHz demonstrations based on the single-flux-quantum cell library for the 10 kA/cm 2 Nb multi-layer process Y Yamanashi, T Kainuma, N Yoshikawa, I Kataeva, H Akaike, A Fujimaki, ... IEICE transactions on electronics 93 (4), 440-444, 2010 | 91 | 2010 |
| Demonstration of a single-flux-quantum microprocessor using passive transmission lines M Tanaka, T Kondo, N Nakajima, T Kawamoto, Y Yamanashi, Y Kamiya, ... IEEE transactions on applied superconductivity 15 (2), 400-404, 2005 | 88 | 2005 |
| Low-energy consumption RSFQ circuits driven by low voltages M Tanaka, A Kitayama, T Koketsu, M Ito, A Fujimaki IEEE Transactions on Applied Superconductivity 23 (3), 1701104-1701104, 2013 | 74 | 2013 |
| A single-flux-quantum logic prototype microprocessor M Tanaka, F Matsuzaki, T Kondo, N Nakajima, Y Yamanashi, A Fujimaki, ... 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004 | 74 | 2004 |
| High-speed operation of random-access-memory-embedded microprocessor with minimal instruction set architecture based on rapid single-flux-quantum logic R Sato, Y Hatanaka, Y Ando, M Tanaka, A Fujimaki, K Takagi, N Takagi IEEE Transactions on Applied Superconductivity 27 (4), 1-5, 2017 | 68 | 2017 |
| 4-bit bit-slice arithmetic logic unit for 32-bit RSFQ microprocessors GM Tang, K Takata, M Tanaka, A Fujimaki, K Takagi, N Takagi IEEE Transactions on Applied Superconductivity 26 (1), 1-6, 2016 | 67 | 2016 |
| Qecool: On-line quantum error correction with a superconducting decoder for surface code Y Ueno, M Kondo, M Tanaka, Y Suzuki, Y Tabuchi 2021 58th ACM/IEEE Design Automation Conference (DAC), 451-456, 2021 | 53 | 2021 |
| SuperNPU: An extremely fast neural processing unit using superconducting logic devices K Ishida, I Byun, I Nagaoka, K Fukumitsu, M Tanaka, S Kawakami, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 51 | 2020 |
| 100-GHz Single-Flux-Quantum Bit-Serial Adder Based on 10- Niobium Process M Tanaka, H Akaike, A Fujimaki, Y Yamanashi, N Yoshikawa, ... IEEE Transactions on Applied Superconductivity 21 (3), 792-796, 2011 | 47 | 2011 |
| Design of a pipelined 8-bit-serial single-flux-quantum microprocessor with multiple ALUs M Tanaka, T Kawamoto, Y Yamanashi, Y Kamiya, A Akimoto, K Fujiwara, ... Superconductor Science and Technology 19 (5), S344, 2006 | 47 | 2006 |
| Design and implementation of a pipelined 8 bit-serial single-flux-quantum microprocessor with cache memories M Tanaka, Y Yamanashi, N Irie, HJ Park, S Iwasaki, K Takagi, K Taketomi, ... Superconductor Science and Technology 20 (11), S305, 2007 | 44 | 2007 |
| Josephson-CMOS hybrid memory with nanocryotrons M Tanaka, M Suzuki, G Konno, Y Ito, A Fujimaki, N Yoshikawa IEEE Transactions on Applied Superconductivity 27 (4), 1-4, 2017 | 41 | 2017 |
| 29.3 A 48GHz 5.6 mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum Logic I Nagaoka, M Tanaka, K Inoue, A Fujimaki 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 460-462, 2019 | 39 | 2019 |
| Design, implementation and on-chip high-speed test of SFQ half-precision floating-point multiplier H Hara, K Obata, H Park, Y Yamanashi, K Taketomi, N Yoshikawa, ... IEEE Transactions on Applied Superconductivity 19 (3), 657-660, 2009 | 39 | 2009 |
| Large-scale integrated circuit design based on a Nb nine-layer structure for reconfigurable data-path processors A Fujimaki, M Tanaka, R Kasagi, K Takagi, M Okada, Y Hayakawa, ... IEICE Transactions on Electronics 97 (3), 157-165, 2014 | 36 | 2014 |
| 32 GHz 6.5 mW gate-level-pipelined 4-bit processor using superconductor single-flux-quantum logic K Ishida, M Tanaka, I Nagaoka, T Ono, S Kawakami, T Tanimoto, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 32 | 2020 |
