Saketh Rama
TitleCited byYear
Minerva: Enabling low-power, highly-accurate deep neural network accelerators
B Reagen, P Whatmough, R Adolf, S Rama, H Lee, SK Lee, ...
2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture …, 2016
2442016
14.3 A 28nm SoC with a 1.2 GHz 568nJ/prediction sparse deep-neural-network engine with> 0.1 timing error rate tolerance for IoT applications
PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei
2017 IEEE International Solid-State Circuits Conference (ISSCC), 242-243, 2017
842017
Fathom: Reference workloads for modern deep learning methods
R Adolf, S Rama, B Reagen, GY Wei, D Brooks
2016 IEEE International Symposium on Workload Characterization (IISWC), 1-10, 2016
562016
Cognitive computing safety: The new horizon for reliability
Y Zhu, VJ Reddi
IEEE Micro 37, 15-21, 2017
42017
The Design and Evolution of Deep Learning Workloads
R Adolf, S Rama, B Reagen, GY Wei, D Brooks
IEEE MICRO 37 (1), 18-21, 2017
2017
2 Counting Distinct Elements in a Stream
JN Scribe, S Rama
2 Load Balancing
JN Scribe, S Rama
ISSCC 2017/SESSION 14/DEEP-LEARNING PROCESSORS/14.3
PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei
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