| A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor SS Mukherjee, C Weaver, J Emer, SK Reinhardt, T Austin Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003 | 1297 | 2003 |
| Transient fault detection via simultaneous multithreading SK Reinhardt, SS Mukherjee Proceedings of the 27th annual international symposium on Computer …, 2000 | 900 | 2000 |
| Detailed design and evaluation of redundant multithreading alternatives SS Mukherjee, M Kontz, SK Reinhardt ACM SIGARCH Computer Architecture News 30 (2), 99-110, 2002 | 726 | 2002 |
| The soft error problem: An architectural perspective SS Mukherjee, J Emer, SK Reinhardt 11th International Symposium on High-Performance Computer Architecture, 243-247, 2005 | 593 | 2005 |
| Techniques to reduce the soft error rate of a high-performance microprocessor C Weaver, J Emer, SS Mukherjee, SK Reinhardt ACM SIGARCH Computer Architecture News 32 (2), 264, 2004 | 385 | 2004 |
| The Alpha 21364 network architecture SS Mukherjee, P Bannon, S Lang, A Spink, D Webb IEEE micro 22 (1), 26-35, 2002 | 347 | 2002 |
| Asim: A performance model framework J Emer, P Ahuja, E Borch, A Klauser, CK Luk, S Manne, SS Mukherjee, ... Computer 35 (2), 68-76, 2002 | 320 | 2002 |
| Computing architectural vulnerability factors for address-based structures A Biswas, P Racunas, R Cheveresan, J Emer, SS Mukherjee, R Rangan 32nd International Symposium on Computer Architecture (ISCA'05), 532-543, 2005 | 300 | 2005 |
| Design and evaluation of hybrid fault-detection systems GA Reis, J Chang, N Vachharajani, SS Mukherjee, R Rangan, DI August 32nd International Symposium on Computer Architecture (ISCA'05), 148-159, 2005 | 254 | 2005 |
| Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator SS Mukherjee, SK Reinhardt, B Falsafi, M Litzkow, MD Hill, DA Wood, ... IEEE Concurrency 8 (4), 12-20, 2000 | 230 | 2000 |
| Cache scrubbing in microprocessors: Myth or necessity? SS Mukherjee, J Emer, T Fossum, SK Reinhardt 10th IEEE Pacific Rim International Symposium on Dependable Computing, 2004 …, 2004 | 194 | 2004 |
| Software-controlled fault tolerance GA Reis, J Chang, N Vachharajani, R Rangan, DI August, SS Mukherjee ACM Transactions on Architecture and Code Optimization (TACO) 2 (4), 366-396, 2005 | 192 | 2005 |
| Self-tuned congestion control for multiprocessor networks M Thottethodi, AR Lebeck, SS Mukherjee Proceedings HPCA Seventh International Symposium on High-Performance …, 2001 | 178 | 2001 |
| Using prediction to accelerate coherence protocols SS Mukherjee, MD Hill Proceedings of the 25th annual international symposium on Computer …, 1998 | 172 | 1998 |
| Architectural core salvaging in a multi-core processor for hard-error tolerance MD Powell, A Biswas, S Gupta, SS Mukherjee ACM SIGARCH Computer Architecture News 37 (3), 93-104, 2009 | 168 | 2009 |
| Perturbation-based fault screening P Racunas, K Constantinides, S Manne, SS Mukherjee 2007 IEEE 13th International Symposium on High Performance Computer …, 2007 | 165 | 2007 |
| Efficient support for irregular applications on distributed-memory machines SS Mukherjee, SD Sharma, MD Hill, JR Larus, A Rogers, J Saltz Proceedings of the fifth ACM SIGPLAN symposium on Principles and practice of …, 1995 | 163 | 1995 |
| On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies N Seifert, V Ambrose, B Gill, Q Shi, R Allmon, C Recchia, S Mukherjee, ... 2010 IEEE International Reliability Physics Symposium, 188-197, 2010 | 158 | 2010 |
| CAMP: A technique to estimate per-structure power at run-time using a few simple parameters MD Powell, A Biswas, JS Emer, SS Mukherjee, BR Sheikh, S Yardi 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 129 | 2009 |
| Buffering unchecked stores for fault detection in redundant multithreading systems using speculative memory support S Reinhardt, S Mukherjee, J Emer, C Weaver US Patent App. 10/749,618, 2005 | 125 | 2005 |
Steven K. ReinhardtMicrosoftVerified email at microsoft.com
