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Ali Yasoubi
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Power-efficient accelerator design for neural networks using computation reuse
A Yasoubi, R Hojabr, M Modarressi
IEEE Computer Architecture Letters 16 (1), 72-75, 2016
292016
Customizing Clos Network-on-Chip for Neural Networks
R Hojabr, M Modarressi, M Daneshtalab, A Yasoubi, A Khonsari
IEEE Transactions on Computers, 2017
212017
CuPAN–high throughput on-chip interconnection for neural networks
A Yasoubi, R Hojabr, H Takshi, M Modarressi, M Daneshtalab
International Conference on Neural Information Processing, 559-566, 2015
62015
Low-power online ECG analysis using neural networks
M Modarressi, A Yasoubi, M Modarressi
2016 Euromicro Conference on Digital System Design (DSD), 547-552, 2016
42016
Computation reuse-aware accelerator for neural networks
H Mahdiani, A Khadem, A Yasoubi, A Ghanbari, M Modarressi, ...
Hardware Architectures for Deep Learning, 147, 2020
12020
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