Marios Constantinou
Marios Constantinou
University of Surrey, Advanced Technology Institute
Verified email at surrey.ac.uk
TitleCited byYear
Simultaneous tunable selection and self-assembly of si nanowires from heterogeneous feedstock
M Constantinou, GP Rigas, FA Castro, V Stolojan, KF Hoettges, ...
ACS nano 10 (4), 4384-4394, 2016
162016
Rapid determination of nanowires electrical properties using a dielectrophoresis-well based system
M Constantinou, KF Hoettges, S Krylyuk, MB Katz, A Davydov, GP Rigas, ...
Applied Physics Letters 110 (13), 133103, 2017
82017
Interface passivation and trap reduction via a solution-based method for near-zero hysteresis nanowire field-effect transistors
M Constantinou, V Stolojan, KP Rajeev, S Hinder, B Fisher, TD Bogart, ...
ACS applied materials & interfaces 7 (40), 22115-22120, 2015
62015
Effect of Nanowire-dielectric Interface on the Hysteresis of Solution Processed Silicon Nanowire FETs
K Prabha Rajeev, C Opoku, V Stolojan, M Constantinou, M Shkunov
Nanoscience and Nanoengineering 5 (2), 17-24, 2017
42017
Heterostructure Source-Gated Transistors: Challenges in Design and Fabrication
RA Sporea, KDGI Jayawardena, M Constantinou, M Ritchie, A Brewin, ...
ECS Transactions 75 (10), 61-66, 2016
32016
Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
K Snashall, M Constantinou, M Shkunov
JoVE (Journal of Visualized Experiments), e56408, 2017
2017
Solution-Processable Nanowire Field-Effect Transistors
M Shkunov, G Rigas, M Constantinou
Nanowires: New Insights, 79, 2017
2017
Nanowire field-effect transistors for gas sensor applications
M Constantinou
PQDT-Global, 2017
2017
Electrical analysis of hysteresis in solution processed silicon nanowire field effect transistors
KP Rajeev, C Opoku, V Stolojan, M Constantinou, M Shkunov
arXiv preprint arXiv:1507.04719, 2015
2015
Printed Nanowire Transistors for Reconfigurable Antenna Applications
M Shukunov, M Constantinou, B Mirkhaydarov, PR Young
2014
Interface passivation and trap reduction via a solution-based method for near zero hysteresis nanowire FETs
M Constantinou, V Stolojan, KP Rajeev, S Hinder, B Fisher, TD Bogart, ...
Solution processable semiconducting nanowires for printed electronics
C Opoku, K Hoettges, M Hughes, R Bale, M Constantinou, A Alshammari, ...
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Articles 1–12