Advait Madhavan

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Mark StilesFellow, National Institute of Standards and TechnologyAdresse e-mail validée de nist.gov
Matthew W. DanielsAlternative Computing Group, National Institute of Standards and TechnologyAdresse e-mail validée de nist.gov
Timothy SherwoodProfessor of Computer Science, UC Santa BarbaraAdresse e-mail validée de cs.ucsb.edu
Dmitri StrukovProfessor of Electrical and Computer Engineering, University of California, Santa BarbaraAdresse e-mail validée de ece.ucsb.edu
Brian D. HoskinsPhysicist | National Institute of Standards and TechnologyAdresse e-mail validée de nist.gov
Jabez McclellandNISTAdresse e-mail validée de nist.gov
Philippe TalatchianCEA-SPINTECAdresse e-mail validée de cnrs-thales.fr
Gina C. AdamAssociate Professor | George Washington UniversityAdresse e-mail validée de gwu.edu
Georgios TzimpragosUniversity of MichiganAdresse e-mail validée de umich.edu
Melika PayvandAssistant Professor at Institute of Neuroinformatics, UZH and ETH ZurichAdresse e-mail validée de ini.uzh.ch
Miguel LastrasProfessor at Universidad Autónoma de San Luis PotosíAdresse e-mail validée de ece.ucsb.edu
Luke TheogarajanProfessor, University of California, Santa BarbaraAdresse e-mail validée de ece.ucsb.edu
Bhaswar ChakrabartiAssistant Professor, Indian Institute of Technology MadrasAdresse e-mail validée de ee.iitm.ac.in
Mirko PreziosoUniversity of California, Santa BarbaraAdresse e-mail validée de ece.ucsb.edu
Frank Alice MizrahiUnité Mixte de Physique CNRS/ThalesAdresse e-mail validée de cnrs-thales.fr
Dr. Saurabh BhardwajThapar Institute of Engineering and TechnologyAdresse e-mail validée de thapar.edu
Prof. Smriti SrivastavaNetaji SubhasUniversity of Technology (Erstwhile NSIT)Adresse e-mail validée de nsut.ac.in

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Advait Madhavan

Assistant Research Scientist, University of Maryland, National Institute of Standards and Technology

Adresse e-mail validée de nist.gov


Titre Trier par citations Trier par année Trier par titre	Citée par Citée par	Année
Roadmap on emerging hardware and technology for machine learning K Berggren, Q Xia, KK Likharev, DB Strukov, H Jiang, T Mikolajick, ... Nanotechnology 32 (1), 012002, 2020	187	2020
Race logic: A hardware acceleration for dynamic programming algorithms A Madhavan, T Sherwood, D Strukov ACM SIGARCH Computer Architecture News 42 (3), 517-528, 2014	123	2014
A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit B Chakrabarti, MA Lastras-Montaño, G Adam, M Prezioso, B Hoskins, ... Scientific reports 7 (1), 42429, 2017	116	2017
Energy-efficient stochastic computing with superparamagnetic tunnel junctions MW Daniels, A Madhavan, P Talatchian, A Mizrahi, MD Stiles Physical review applied 13 (3), 034016, 2020	78	2020
A computational temporal logic for superconducting accelerators G Tzimpragos, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020	44	2020
Boosted race trees for low energy classification G Tzimpragos, A Madhavan, D Vasudevan, D Strukov, T Sherwood Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019	34	2019
High-throughput pattern matching with CMOL FPGA circuits: Case for logic-in-memory computing A Madhavan, T Sherwood, DB Strukov IEEE transactions on very large scale integration (VLSI) systems 26 (12 …, 2018	25	2018
A 4-mm² 180-nm-CMOS 15-Giga-cell-updates-per-second DNA sequence alignment engine based on asynchronous race conditions A Madhavan, T Sherwood, D Strukov 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017	24	2017
Temporal memory with magnetic racetracks H Vakili, MN Sakib, S Ganguly, M Stan, MW Daniels, A Madhavan, ... IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 6 …, 2020	22	2020
Vertical integration of memristors onto foundry CMOS dies using wafer-scale integration J Rofeh, A Sodhi, M Payvand, MA Lastras-Montaño, A Ghofrani, ... 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 957-962, 2015	22	2015
A configurable CMOS memory platform for 3D-integrated memristors M Payvand, A Madhavan, MA Lastras-Montaño, A Ghofrani, J Rofeh, ... 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1378-1381, 2015	19	2015
Mutual control of stochastic switching for two electrically coupled superparamagnetic tunnel junctions P Talatchian, MW Daniels, A Madhavan, MR Pufall, E Jué, WH Rippard, ... Physical Review B 104 (5), 054427, 2021	18	2021
Streaming batch eigenupdates for hardware neural networks BD Hoskins, MW Daniels, S Huang, A Madhavan, GC Adam, N Zhitenev, ... Frontiers in neuroscience 13, 793, 2019	18	2019
Temporal computing with superconductors G Tzimpragos, J Volk, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... IEEE Micro 41 (3), 71-79, 2021	17	2021
Race logic: abusing hardware race conditions to perform useful computation A Madhavan, T Sherwood, D Strukov IEEE Micro 35 (3), 48-57, 2015	14	2015
3d reram arrays and crossbars: Fabrication, characterization and applications GC Adam, B Chrakrabarti, H Nili, B Hoskins, MA Lastras-Montaño, ... 2017 IEEE 17th International Conference on Nanotechnology (IEEE-Nano), 844-849, 2017	13	2017
Implementation of a binary neural network on a passive array of magnetic tunnel junctions JM Goodwill, N Prasad, BD Hoskins, MW Daniels, A Madhavan, L Wan, ... Physical Review Applied 18 (1), 014039, 2022	12	2022
Storing and retrieving wavefronts with resistive temporal memory A Madhavan, MD Stiles IEEE International Symposium on Circuits and Systems (ISCAS), 2019	11	2019
Temporal state machines: Using temporal memory to stitch time-based graph computations A Madhavan, MW Daniels, MD Stiles ACM Journal on Emerging Technologies in Computing Systems (JETC) 17 (3), 1-27, 2021	9	2021
Associative memories using complex-valued Hopfield networks based on spin-torque oscillator arrays N Prasad, P Mukim, A Madhavan, MD Stiles Neuromorphic Computing and Engineering 2 (3), 034003, 2022	7	2022

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