Daniel Ziener
TitleCited byYear
On-the-fly composition of FPGA-based SQL query accelerators using a partially reconfigurable module library
C Dennl, D Ziener, J Teich
2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012
692012
Power signature watermarking of IP cores for FPGAs
D Ziener, J Teich
Journal of Signal Processing Systems 51 (1), 123-136, 2008
622008
Identifying FPGA IP-cores based on lookup table content analysis
D Ziener, S Aßmus, J Teich
2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006
452006
FPGAs for Software Programmers
D Koch, F Hannig, D Ziener
Springer, 2016
442016
Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration
A Becher, F Bauer, D Ziener, J Teich
2014 24th International Conference on Field Programmable Logic and …, 2014
442014
Acceleration of SQL restrictions and aggregations through FPGA-based dynamic partial reconfiguration
C Dennl, D Ziener, J Teich
2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013
442013
Netlist-level IP protection by watermarking for LUT-based FPGAs
M Schmid, D Ziener, J Teich
2008 International Conference on Field-Programmable Technology, 209-216, 2008
432008
A self-adaptive SEU mitigation system for FPGAs with an internal block RAM radiation particle sensor
R Glein, B Schmidt, F Rittner, J Teich, D Ziener
2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014
362014
Partial reconfiguration on FPGAs in practice—Tools and applications
D Koch, J Torresen, C Beckhoff, D Ziener, C Dennl, V Breuer, J Teich, ...
ARCS 2012, 1-12, 2012
252012
Using the power side channel of FPGAs for communication
D Ziener, F Baueregger, J Teich
2010 18th IEEE Annual International Symposium on Field-Programmable Custom …, 2010
242010
FPGA core watermarking based on power signature analysis
D Ziener, J Teich
2006 IEEE International Conference on Field Programmable Technology, 205-212, 2006
242006
Symbolic design space exploration for multi-mode reconfigurable systems
S Wildermann, F Reimann, D Ziener, J Teich
Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011
232011
FPGA-based dynamically reconfigurable SQL query processing
D Ziener, F Bauer, A Becher, C Dennl, K Meyer-Wegener, U Schürfeld, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (4), 25, 2016
202016
A co-design approach for accelerated SQL query processing via FPGA-based data filtering
A Becher, D Ziener, K Meyer-Wegener, J Teich
2015 International Conference on Field Programmable Technology (FPT), 192-195, 2015
192015
Stress-aware module placement on reconfigurable devices
J Angermeier, D Ziener, M Glaß, J Teich
2011 21st International Conference on Field Programmable Logic and …, 2011
162011
Multiplexing methods for power watermarking
D Ziener, F Baueregger, J Teich
2010 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2010
162010
Evaluation of Watermarking methods for FPGA-based IP-cores
D Ziener, J Teich
University of Erlangen-Nuremberg, Department of CS 12, 2005
162005
Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy
R Glein, F Rittner, A Becher, D Ziener, J Frickel, J Teich, A Heuberger
2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 1-8, 2015
152015
A rapid prototyping system for error-resilient multi-processor systems-on-chip
M May, N Wehn, A Bouajila, J Zeppenfeld, W Stechele, A Herkersdorf, ...
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
132010
Watermarking Apparatus, Software Enabling an Implementation of an Electronic Circuit Comprising a Watermark, Method for Detecting a Watermark and Apparatus for Detecting a …
D Ziener, J Teich
US Patent App. 11/551,213, 2006
12*2006
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Articles 1–20